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| author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2021-12-17 16:08:04 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-23 14:38:14 +0000 |
| commit | 351d3a1967ed73097f3517fc77872d67197c193e (patch) | |
| tree | 075838a547da45536639d818e769abf8075b4b51 /src/arch/x86/acpi.c | |
| parent | 8fac662f308cdfbeec3f71d4728f71ad79c06925 (diff) | |
mb/intel/adlrvp_n: Add support for ADL-N LP5 RVP
Add support for Alder lake N LP5 RVP with board ID 0x7.
Since SPD index 7 is unused earlier, ADL-N will use it.
Change-Id: Ib2f53e65f75e23793d8c85ee924827446fd9fea7
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/arch/x86/acpi.c')
0 files changed, 0 insertions, 0 deletions