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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-02-23 09:47:24 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2024-03-14 18:56:43 +0000
commite357ac3321d219eb6e7f7687f7ceda0e7e63391c (patch)
tree4f8ad6007500616138d802f7cb732d7f8b599c6a /payloads/libpayload/include
parentabc274474a7e19ed24975587e8e46568eade2c79 (diff)
soc/intel/xeon_sp: Use common _CRS code generation
Drop SoC specific code and use generic implementation provided by pci_domain_fill_ssdt. TEST=Booted on IBM/SBP1 to Ubuntu 22.04. TEST=intel/archercity CRB Change-Id: I8b0bc2eb02569b5d74f8521d79e0af8fee880c80 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80796 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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