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| author | Saurabh Mishra <mishra.saurabh@intel.corp-partner.google.com> | 2022-08-29 12:39:27 +0530 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-09-04 16:08:32 +0000 |
| commit | 25d16291d4a3b92e7a23d271d796246a1d18190a (patch) | |
| tree | 5e71a224519aa20f09e7b220bd8d3c950d2ab729 /configs/config.google_panther.pch_serialio_uart | |
| parent | 63f72f0cd0d01ef6138bfba80b7cd19d57c6602c (diff) | |
vc/intel/fsp: Update ADL N FSP headers from v3267.01 to v3301.00
Update generated FSP headers for Alder Lake N from v3267.01 to v3301.00.
Changes include:
- FspsUpd.h: 1. Add VccInAuxImonSlope UPD
2. Update UPD Offset in FspsUpd.h
BUG=b:242152105
BRANCH=None
TEST=Build using "emerge-nissa intel-adlnfsp"and boot Nissa.
Change-Id: I7b921e2aa467593a1c764fc554e2e83e8bb526e8
Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67167
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'configs/config.google_panther.pch_serialio_uart')
0 files changed, 0 insertions, 0 deletions