diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-07-13 07:20:47 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-14 23:10:30 +0000 |
| commit | efd2720e4790924a434823d701664de8ee2eb9e4 (patch) | |
| tree | 5103e33858ebfbdb00a5cf44bb4a285e3bf6f627 | |
| parent | 84b2f9f5b8e40eb9a114c1be5741b4141c5566e0 (diff) | |
arch/x86: Mark prepare_and_run_postcar noreturn
This moves the die() statement to a common place.
Change-Id: I24c9f00bfee169b4ca57b469c089188ec62ddada
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65812
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Julius Werner <jwerner@chromium.org>
| -rw-r--r-- | src/arch/x86/include/arch/romstage.h | 2 | ||||
| -rw-r--r-- | src/arch/x86/postcar_loader.c | 3 | ||||
| -rw-r--r-- | src/cpu/intel/car/romstage.c | 1 | ||||
| -rw-r--r-- | src/drivers/amd/agesa/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 1 |
5 files changed, 3 insertions, 5 deletions
diff --git a/src/arch/x86/include/arch/romstage.h b/src/arch/x86/include/arch/romstage.h index d637d19b8a..063d4edd6b 100644 --- a/src/arch/x86/include/arch/romstage.h +++ b/src/arch/x86/include/arch/romstage.h @@ -43,7 +43,7 @@ void fill_postcar_frame(struct postcar_frame *pcf); * prepare_and_run_postcar() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use. */ -void prepare_and_run_postcar(void); +void __noreturn prepare_and_run_postcar(void); /* * Systems without a native coreboot cache-as-ram teardown may implement diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index af8152d72b..c6a128bb69 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -63,7 +63,7 @@ static void run_postcar_phase(struct postcar_frame *pcf); /* prepare_and_run_postcar() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use. */ -void prepare_and_run_postcar(void) +void __noreturn prepare_and_run_postcar(void) { struct postcar_frame pcf; @@ -76,6 +76,7 @@ void prepare_and_run_postcar(void) run_postcar_phase(&pcf); /* We do not return here. */ + die("Failed to load postcar\n!"); } static void finalize_load(uintptr_t *reloc_params, uintptr_t mtrr_frame_ptr) diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index a2d1a89292..7a7d077fdd 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -54,5 +54,4 @@ void __noreturn romstage_main(void) prepare_and_run_postcar(); /* We do not return here. */ - die("failed to load postcar\n"); } diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 82ef31ebd3..f60239abfe 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -76,7 +76,6 @@ void __noreturn romstage_main(void) prepare_and_run_postcar(); /* We do not return. */ - die("failed to load postcar\n"); } static void ap_romstage_main(void) diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 973e6090c5..7d1124ad45 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -119,7 +119,6 @@ void __noreturn romstage_main(void) post_code(0x44); prepare_and_run_postcar(); - die("failed to load postcar\n"); } void fill_postcar_frame(struct postcar_frame *pcf) |