diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-06-23 11:53:34 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-14 23:10:17 +0000 |
| commit | 84b2f9f5b8e40eb9a114c1be5741b4141c5566e0 (patch) | |
| tree | 6d7eff7f689cb392db7ee8401f9626905a1151cf | |
| parent | b95a821576d0a1923e6a115b0d8272cd25890bfe (diff) | |
lib/program_loaders.c: Mark run_ramstage with __noreturn
This allows the compiler to optimize out code called after run_ramstage.
Also remove some die() statements in soc code as run_ramstage already
has a die_with_postcode statement.
Change-Id: Id8b841712661d3257b0dc67b509f97bdc31fcf6f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Julius Werner <jwerner@chromium.org>
| -rw-r--r-- | src/include/program_loading.h | 2 | ||||
| -rw-r--r-- | src/lib/prog_loaders.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/cezanne/romstage.c | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/romstage.c | 3 | ||||
| -rw-r--r-- | src/soc/amd/sabrina/romstage.c | 1 |
5 files changed, 2 insertions, 7 deletions
diff --git a/src/include/program_loading.h b/src/include/program_loading.h index 7ff55fc4b5..e53cb7c973 100644 --- a/src/include/program_loading.h +++ b/src/include/program_loading.h @@ -152,7 +152,7 @@ enum cb_err legacy_romstage_select_and_load(struct prog *romstage); */ void preload_ramstage(void); /* Run ramstage from romstage. */ -void run_ramstage(void); +void __noreturn run_ramstage(void); /*********************** * PAYLOAD LOADING * diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 0139ca4099..01775b92bd 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -82,7 +82,7 @@ void preload_ramstage(void) cbfs_preload(CONFIG_CBFS_PREFIX "/ramstage"); } -void run_ramstage(void) +void __noreturn run_ramstage(void) { struct prog ramstage = PROG_INIT(PROG_RAMSTAGE, CONFIG_CBFS_PREFIX "/ramstage"); diff --git a/src/soc/amd/cezanne/romstage.c b/src/soc/amd/cezanne/romstage.c index 7a395bdf9b..dce0b69735 100644 --- a/src/soc/amd/cezanne/romstage.c +++ b/src/soc/amd/cezanne/romstage.c @@ -25,5 +25,4 @@ void __noreturn romstage_main(void) memmap_stash_early_dram_usage(); run_ramstage(); - die("failed to load ramstage\n"); } diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index e66f423d52..ccb11f083a 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -25,7 +25,4 @@ void __noreturn romstage_main(void) post_code(0x44); run_ramstage(); - - post_code(0x50); /* Should never see this post code. */ - die("failed to load ramstage\n"); } diff --git a/src/soc/amd/sabrina/romstage.c b/src/soc/amd/sabrina/romstage.c index c5dfbdaa18..9f2be8ee51 100644 --- a/src/soc/amd/sabrina/romstage.c +++ b/src/soc/amd/sabrina/romstage.c @@ -27,5 +27,4 @@ void __noreturn romstage_main(void) memmap_stash_early_dram_usage(); run_ramstage(); - die("failed to load ramstage\n"); } |