diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2024-08-14 05:57:05 +0200 |
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committer | Elyes Haouas <ehaouas@noos.fr> | 2024-10-23 23:42:07 +0000 |
commit | 869e0733a7c5ab4f9b15e411dd3b8b498b21d09f (patch) | |
tree | c89fbf571e3043999064d56dc96589c520826927 | |
parent | 04f8a662953402ee6c01aae89a1a432fa022d785 (diff) |
device/dram/ddr3: Use boolean for spd_dimm_is_registered_ddr3()
Change-Id: I8c9d66777b69b35f4df147c141fe94694f57be31
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83902
Reviewed-by: coreboot org <coreboot.org@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/device/dram/ddr3.c | 6 | ||||
-rw-r--r-- | src/include/device/dram/ddr3.h | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index 09a4e7ff9f..30dbe83753 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -27,13 +27,13 @@ * * @param type DIMM type. This is byte[3] of the SPD. */ -int spd_dimm_is_registered_ddr3(enum spd_dimm_type_ddr3 type) +bool spd_dimm_is_registered_ddr3(enum spd_dimm_type_ddr3 type) { if ((type == SPD_DDR3_DIMM_TYPE_RDIMM) | (type == SPD_DDR3_DIMM_TYPE_MINI_RDIMM) | (type == SPD_DDR3_DIMM_TYPE_72B_SO_RDIMM)) - return 1; + return true; - return 0; + return false; } /** diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index c4fd253efd..2f8766be8a 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -158,7 +158,7 @@ typedef u8 spd_ddr3_raw_data[SPD_SIZE_MAX_DDR3]; u16 spd_ddr3_calc_crc(u8 *spd, int len); u16 spd_ddr3_calc_unique_crc(u8 *spd, int len); int spd_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_ddr3_raw_data spd_data); -int spd_dimm_is_registered_ddr3(enum spd_dimm_type_ddr3 type); +bool spd_dimm_is_registered_ddr3(enum spd_dimm_type_ddr3 type); void dram_print_spd_ddr3(const struct dimm_attr_ddr3_st *dimm); int spd_xmp_decode_ddr3(struct dimm_attr_ddr3_st *dimm, spd_ddr3_raw_data spd, |