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/**
* @file
*
* ALIB PSPP config
*
*
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: GNB
* @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
*
*/
/*
*****************************************************************************
*
* Copyright 2008 - 2012 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
*
* AMD is granting you permission to use this software (the Materials)
* pursuant to the terms and conditions of your Software License Agreement
* with AMD. This header does *NOT* give you permission to use the Materials
* or any rights under AMD's intellectual property. Your use of any portion
* of these Materials shall constitute your acceptance of those terms and
* conditions. If you do not agree to the terms and conditions of the Software
* License Agreement, please do not use any portion of these Materials.
*
* CONFIDENTIALITY: The Materials and all other information, identified as
* confidential and provided to you by AMD shall be kept confidential in
* accordance with the terms and conditions of the Software License Agreement.
*
* LIMITATION OF LIABILITY: THE MATERIALS AND ANY OTHER RELATED INFORMATION
* PROVIDED TO YOU BY AMD ARE PROVIDED "AS IS" WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
* MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY PARTICULAR PURPOSE,
* OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
* IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR ANY DAMAGES WHATSOEVER
* (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS
* INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF AMD'S NEGLIGENCE,
* GROSS NEGLIGENCE, THE USE OF OR INABILITY TO USE THE MATERIALS OR ANY OTHER
* RELATED INFORMATION PROVIDED TO YOU BY AMD, EVEN IF AMD HAS BEEN ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS PROHIBIT THE
* EXCLUSION OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES,
* THE ABOVE LIMITATION MAY NOT APPLY TO YOU.
*
* AMD does not assume any responsibility for any errors which may appear in
* the Materials or any other related information provided to you by AMD, or
* result from use of the Materials or any related information.
*
* You agree that you will not reverse engineer or decompile the Materials.
*
* NO SUPPORT OBLIGATION: AMD is not obligated to furnish, support, or make any
* further information, software, technical information, know-how, or show-how
* available to you. Additionally, AMD retains the right to modify the
* Materials at any time, without notice, and is not obligated to provide such
* modified Materials to you.
*
* U.S. GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with
* "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is
* subject to the restrictions as set forth in FAR 52.227-14 and
* DFAR252.227-7013, et seq., or its successor. Use of the Materials by the
* Government constitutes acknowledgement of AMD's proprietary rights in them.
*
* EXPORT ASSURANCE: You agree and certify that neither the Materials, nor any
* direct product thereof will be exported directly or indirectly, into any
* country prohibited by the United States Export Administration Act and the
* regulations thereunder, without the required authorization from the U.S.
* government nor will be used for any purpose prohibited by the same.
* ***************************************************************************
*
*/
#ifndef _PCIEALIBCONFIG_H_
#define _PCIEALIBCONFIG_H_
//#define PCIE_PHY_LANE_POWER_GATE_SUPPORT
// #define PCIE_DISABLE_UNUSED_LANES_ON_ACTIVE_LINK
#define DEF_OFFSET_START_CORE_LANE 2
#define DEF_OFFSET_END_CORE_LANE 3
#define DEF_OFFSET_START_PHY_LANE 0
#define DEF_OFFSET_END_PHY_LANE 1
#define DEF_OFFSET_PORT_ID 4
#define DEF_OFFSET_WRAPPER_ID 5
#define DEF_OFFSET_LINK_HOTPLUG 7
#define DEF_OFFSET_GEN2_CAP 8
#define DEF_OFFSET_CLK_PM_SUPPORT 9
#define DEF_BASIC_HOTPLUG 1
#define DEF_PSPP_POLICY_START 1
#define DEF_PSPP_POLICY_STOP 0
#define DEF_PSPP_POLICY_PERFORMANCE 1
#define DEF_PSPP_POLICY_BALANCEHIGH 2
#define DEF_PSPP_POLICY_BALANCELOW 3
#define DEF_PSPP_POLICY_POWERSAVING 4
#define DEF_PSPP_STATE_AC 0
#define DEF_PSPP_STATE_DC 1
#define DEF_TRAINING_STATE_COMPLETE 0
#define DEF_TRAINING_STATE_DETECT_PRESENCE 1
#define DEF_TRAINING_STATE_PRESENCE_DETECTED 2
#define DEF_TRAINING_GEN2_WORKAROUND 3
#define DEF_TRAINING_STATE_NOT_PRESENT 4
#define DEF_TRAINING_DEVICE_PRESENT 5
#define DEF_TRAINING_STATE_RELEASE_TRAINING 6
#define DEF_TRAINING_STATE_REQUEST_RESET 7
#define DEF_TRAINING_STATE_EXIT 8
#define DEF_LINK_SPEED_GEN1 1
#define DEF_LINK_SPEED_GEN2 2
#define DEF_HOTPLUG_STATUS_DEVICE_NOT_PRESENT 0
#define DEF_HOTPLUG_STATUS_DEVICE_PRESENT 1
#define DEF_PORT_NOT_ALLOCATED 0
#define DEF_PORT_ALLOCATED 1
#define DEF_PCIE_LANE_POWERON 1
#define DEF_PCIE_LANE_POWEROFF 0
#define DEF_PCIE_LANE_POWEROFFUNUSED 2
#define DEF_SCARTCH_PSPP_START_OFFSET 0
#define DEF_SCARTCH_PSPP_POLICY_OFFSET 1
#define DEF_SCARTCH_PSPP_ACDC_OFFSET 5
#define DEF_SCARTCH_PSPP_ACDC_OVR_OFFSET 6
#define DEF_SCARTCH_PSPP_REQ_OFFSET 16
#define DEF_LINKWIDTH_ACTIVE 0
#define DEF_LINKWIDTH_MAX_PHY 1
#define DEF_SB_PORT_INDEX 6
#define TRUE 1
#define FALSE 0
#endif
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