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/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 Dynon Avionics
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include "w83627uhg.h"
static void pnp_enter_ext_func_mode(device_t dev)
{
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
u16 port = dev >> 8;
outb(0xaa, port);
}
/** Set the input clock to 24 or 48 MHz. */
static void w83627uhg_set_input_clk_sel(device_t dev, u8 speed_24mhz)
{
u8 value;
value = pnp_read_config(dev, 0x24);
value &= ~(1 << 6);
if (!speed_24mhz)
value |= (1 << 6);
pnp_write_config(dev, 0x24, value);
}
static void w83627uhg_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
pnp_exit_ext_func_mode(dev);
}
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