1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007, 2008 Rudolf Marek <r.marek@assembler.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#define SATA_MISC_CTRL 0x45
static void sata_i_init(struct device *dev)
{
u8 reg;
printk(BIOS_DEBUG, "Configuring VIA SATA controller\n");
/* Class IDE Disk */
reg = pci_read_config8(dev, SATA_MISC_CTRL);
reg &= 0x7f; /* Sub Class Write Protect off */
pci_write_config8(dev, SATA_MISC_CTRL, reg);
/* Change the device class to SATA from RAID. */
pci_write_config8(dev, PCI_CLASS_DEVICE, 0x1);
reg |= 0x80; /* Sub Class Write Protect on */
pci_write_config8(dev, SATA_MISC_CTRL, reg);
return;
}
static void sata_ii_init(struct device *dev)
{
u8 reg;
sata_i_init(dev);
/*
* Analog black magic, you may or may not need to adjust 0x60-0x6f,
* depends on PCB.
*/
/*
* Analog PHY - gen1
* CDR bandwidth [6:5] = 3
* Squelch Window Select [4:3] = 1
* CDR Charge Pump [2:0] = 1
*/
pci_write_config8(dev, 0x64, 0x49);
/* Adjust driver current source value to 9. */
reg = pci_read_config8(dev, 0x65);
reg &= 0xf0;
reg |= 0x9;
pci_write_config8(dev, 0x65, reg);
/* Set all manual termination 50ohm bits [2:0] and enable [4]. */
reg = pci_read_config8(dev, 0x6a);
reg |= 0xf;
pci_write_config8(dev, 0x6a, reg);
/*
* Analog PHY - gen2
* CDR bandwidth [5:4] = 2
* Pre / De-emphasis Level [7:6] controls bits [3:2], rest in 0x6e
* CDR Charge Pump [2:0] = 1
*/
reg = pci_read_config8(dev, 0x6f);
reg &= 0x08;
reg |= 0x61;
pci_write_config8(dev, 0x6f, reg);
/* Check if staggered spinup is supported. */
reg = pci_read_config8(dev, 0x83);
if ((reg & 0x8) == 0) {
/* Start OOB sequence on both drives. */
reg |= 0x30;
pci_write_config8(dev, 0x83, reg);
}
}
static void vt8237_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
pci_write_config16(dev, 0xd4, vendor);
pci_write_config16(dev, 0xd6, device);
}
static struct pci_operations lops_pci = {
.set_subsystem = vt8237_set_subsystem,
};
static const struct device_operations sata_i_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = sata_i_init,
.enable = 0,
.ops_pci = &lops_pci,
};
static const struct device_operations sata_ii_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = sata_ii_init,
.enable = 0,
.ops_pci = &lops_pci,
};
static const struct pci_driver northbridge_driver_ii __pci_driver = {
.ops = &sata_ii_ops,
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_VT8237_SATA,
};
static const struct pci_driver northbridge_driver_i_a __pci_driver = {
.ops = &sata_i_ops,
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_VT8237A_SATA,
};
static const struct pci_driver northbridge_driver_i __pci_driver = {
.ops = &sata_i_ops,
.vendor = PCI_VENDOR_ID_VIA,
.device = PCI_DEVICE_ID_VIA_VT6420_SATA,
};
|
