blob: 9ba1286623dcc26fd84ebfcf4d3e6808a44043a1 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2014 Sage Electronic Engineering, LLC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc.
*/
#ifndef AMD_PCI_UTIL_H
#define AMD_PCI_UTIL_H
#include <stdint.h>
#include "amd_pci_int_defs.h"
/* FCH index/data registers */
#define PCI_INTR_INDEX 0xc00
#define PCI_INTR_DATA 0xc01
#ifndef __PRE_RAM__
struct pirq_struct {
u8 devfn;
u8 PIN[4]; /* PINA/B/C/D are index 0/1/2/3 */
};
extern const struct pirq_struct * pirq_data_ptr;
extern u32 pirq_data_size;
extern const u8 * intr_data_ptr;
extern const u8 * picr_data_ptr;
u8 read_pci_int_idx(u8 index, int mode);
void write_pci_int_idx(u8 index, int mode, u8 data);
void write_pci_cfg_irqs(void);
void write_pci_int_table (void);
#endif /* __PRE_RAM */
#endif /* AMD_PCI_UTIL_H */
|
