summaryrefslogtreecommitdiff
path: root/src/soc/rockchip/rk3399/spi_bitbang.c
blob: 8bc45e50be7015c2da32b412e2676a74a9cf87e9 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
/* SPDX-License-Identifier: GPL-2.0-only */

/* Compile this driver in place of common/spi.c for bitbang testing.
   NOTE: Also need to adjust board-specific code for GPIO pinmux! */

#include <assert.h>
#include <gpio.h>
#include <soc/spi.h>
#include <spi_bitbang.h>
#include <spi_flash.h>
#include <stddef.h>

struct rockchip_bitbang_slave {
	struct spi_bitbang_ops ops;
	gpio_t miso;
	gpio_t mosi;
	gpio_t clk;
	gpio_t cs;
};

static int get_miso(const struct spi_bitbang_ops *ops)
{
	const struct rockchip_bitbang_slave *slave =
		container_of(ops, const struct rockchip_bitbang_slave, ops);
	return gpio_get(slave->miso);
}

static void set_mosi(const struct spi_bitbang_ops *ops, int value)
{
	const struct rockchip_bitbang_slave *slave =
		container_of(ops, const struct rockchip_bitbang_slave, ops);
	gpio_set(slave->mosi, value);
}

static void set_clk(const struct spi_bitbang_ops *ops, int value)
{
	const struct rockchip_bitbang_slave *slave =
		container_of(ops, const struct rockchip_bitbang_slave, ops);
	gpio_set(slave->clk, value);
}

static void set_cs(const struct spi_bitbang_ops *ops, int value)
{
	const struct rockchip_bitbang_slave *slave =
		container_of(ops, const struct rockchip_bitbang_slave, ops);
	gpio_set(slave->cs, value);
}

/* Can't use GPIO() here because of bug in GCC version used by ChromiumOS. */
static const struct rockchip_bitbang_slave slaves[] = {
	[0] = {
		.ops = { get_miso, set_mosi, set_clk, set_cs },
		.miso	= { .port = 3, .bank = GPIO_A, .idx = 4 },
		.mosi	= { .port = 3, .bank = GPIO_A, .idx = 5 },
		.clk	= { .port = 3, .bank = GPIO_A, .idx = 6 },
		.cs	= { .port = 3, .bank = GPIO_A, .idx = 7 },
	},
	[1]	= {
		.ops = { get_miso, set_mosi, set_clk, set_cs },
		.miso	= { .port = 1, .bank = GPIO_A, .idx = 7 },
		.mosi	= { .port = 1, .bank = GPIO_B, .idx = 0 },
		.clk	= { .port = 1, .bank = GPIO_B, .idx = 1 },
		.cs	= { .port = 1, .bank = GPIO_B, .idx = 2 },
	},
	[2]	= {
		.ops = { get_miso, set_mosi, set_clk, set_cs },
		.miso	= { .port = 2, .bank = GPIO_B, .idx = 1 },
		.mosi	= { .port = 2, .bank = GPIO_B, .idx = 2 },
		.clk	= { .port = 2, .bank = GPIO_B, .idx = 3 },
		.cs	= { .port = 2, .bank = GPIO_B, .idx = 4 },
	},
	[3]	= {
		.ops = { get_miso, set_mosi, set_clk, set_cs },
		.miso	= { .port = 1, .bank = GPIO_B, .idx = 7 },
		.mosi	= { .port = 1, .bank = GPIO_C, .idx = 0 },
		.clk	= { .port = 1, .bank = GPIO_C, .idx = 1 },
		.cs	= { .port = 1, .bank = GPIO_C, .idx = 2 },
	},
	[4]	= {
		.ops = { get_miso, set_mosi, set_clk, set_cs },
		.miso	= { .port = 3, .bank = GPIO_A, .idx = 0 },
		.mosi	= { .port = 3, .bank = GPIO_A, .idx = 1 },
		.clk	= { .port = 3, .bank = GPIO_A, .idx = 2 },
		.cs	= { .port = 3, .bank = GPIO_A, .idx = 3 },
	},
	[5]	= {
		.ops = { get_miso, set_mosi, set_clk, set_cs },
		.miso	= { .port = 2, .bank = GPIO_C, .idx = 4 },
		.mosi	= { .port = 2, .bank = GPIO_C, .idx = 5 },
		.clk	= { .port = 2, .bank = GPIO_C, .idx = 6 },
		.cs	= { .port = 2, .bank = GPIO_C, .idx = 7 },
	},
};

void rockchip_spi_init(unsigned int bus, unsigned int ignored_speed_hz)
{
	assert(bus >= 0 && bus < ARRAY_SIZE(slaves));

	gpio_output(slaves[bus].cs, 1);
	gpio_output(slaves[bus].clk, 0);
	gpio_input(slaves[bus].miso);
	gpio_output(slaves[bus].mosi, 0);
}

void rockchip_spi_set_sample_delay(unsigned int bus, unsigned int delay_ns)
{
	/* not supported, and not necessary for slow bitbang speeds */
}

static int spi_ctrlr_claim_bus(const struct spi_slave *slave)
{
	assert(slave->bus >= 0 && slave->bus < ARRAY_SIZE(slaves));
	return spi_bitbang_claim_bus(&slaves[slave->bus].ops);
}

static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
	assert(slave->bus >= 0 && slave->bus < ARRAY_SIZE(slaves));
	spi_bitbang_release_bus(&slaves[slave->bus].ops);
}

static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
			  size_t bytes_out, void *din, size_t bytes_in)
{
	assert(slave->bus >= 0 && slave->bus < ARRAY_SIZE(slaves));
	return spi_bitbang_xfer(&slaves[slave->bus].ops,
				dout, bytes_out, din, bytes_in);
}

static const struct spi_ctrlr spi_ctrlr = {
	.claim_bus = spi_ctrlr_claim_bus,
	.release_bus = spi_ctrlr_release_bus,
	.xfer = spi_ctrlr_xfer,
	.max_xfer_size = 65535,
};

const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
	{
		.ctrlr = &spi_ctrlr,
		.bus_start = 0,
		.bus_end = ARRAY_SIZE(slaves) - 1,
	},
};

const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map);