blob: 31c999806fe21def165286c6ed4815b253b09a4a (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
|
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Rockchip Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <arch/cache.h>
#include <bootmode.h>
#include <console/console.h>
#include <device/device.h>
#include <gpio.h>
#include <soc/display.h>
#include <soc/soc.h>
#include <soc/sdram.h>
#include <stddef.h>
#include <symbols.h>
#include "chip.h"
static void soc_init(struct device *dev)
{
ram_resource(dev, 0, (uintptr_t)_dram/KiB, sdram_size_mb()*(MiB/KiB));
if (display_init_required())
rk_display_init(dev, (uintptr_t)_framebuffer,
REGION_SIZE(framebuffer));
else
printk(BIOS_INFO, "Skipping display init.\n");
}
static struct device_operations soc_ops = {
.read_resources = DEVICE_NOOP,
.set_resources = DEVICE_NOOP,
.init = soc_init,
.scan_bus = 0,
};
static void enable_rk3288_dev(struct device *dev)
{
dev->ops = &soc_ops;
}
struct chip_operations soc_rockchip_rk3288_ops = {
CHIP_NAME("SOC Rockchip 3288")
.enable_dev = enable_rk3288_dev,
};
|