blob: e40dd6b29139e126dc2377baae9cec47363c67d9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2015 Google Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <intelblocks/itss.h>
#include <intelblocks/pcr.h>
#include <soc/iomap.h>
#include <soc/irq.h>
#include <soc/itss.h>
#include <soc/gpe.h>
#include <soc/pcr_ids.h>
/* GPIO Controller */
#include "gpio.asl"
/* Interrupt Routing */
#include "irqlinks.asl"
/* LPC 0:1f.0 */
#include "lpc.asl"
/* PCH HDA */
#include "pch_hda.asl"
/* PCIE Ports */
#include "pcie.asl"
/* PCR Access */
#include "pcr.asl"
/* PMC 0:1f.2 */
#include "pmc.asl"
/* Serial IO */
#include "serialio.asl"
/* SMBus 0:1f.3 */
#include "smbus.asl"
/* Storage Controllers */
#include "scs.asl"
/* USB XHCI 0:14.0 */
#include "xhci.asl"
Method (_OSC, 4)
{
/* Check for proper GUID */
If (LEqual (Arg0, ToUUID ("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
{
/* Let OS control everything */
Return (Arg3)
}
Else
{
/* Unrecognized UUID */
CreateDWordField (Arg3, 0, CDW1)
Or (CDW1, 4, CDW1)
Return (Arg3)
}
}
/* SGX */
#if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX)
#include <soc/intel/common/acpi/sgx.asl>
#endif
|
