blob: aa5f2b5d9513c51cc0b78badc520d6cb7a2f89ab (
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ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += sd.c
endif
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += mmc.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_UFS_SUPPORT) += ufs.c
romstage-$(CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE) += early_mmc.c
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