blob: 25cde37d1a41e260ea29af148f22da0d728c2242 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
config SOC_INTEL_COMMON_BLOCK_PCIE
bool
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
help
Intel Processor common PCIE support
if SOC_INTEL_COMMON_BLOCK_PCIE
source "src/soc/intel/common/block/pcie/*/Kconfig"
config PCIEXP_CLK_PM
default y
config PCIEXP_L1_SUB_STATE
default y
endif # SOC_INTEL_COMMON_BLOCK_PCIE
config PCIE_DEBUG_INFO
bool
help
Enable debug logs in PCIe module. Allows debug information on memory
base and limit, prefetchable memory base and limit, prefetchable memory
base upper 32 bits and prefetchable memory limit upper 32 bits.
|
