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config SOC_INTEL_COMMON_BLOCK_CSE
bool
default n
help
Driver for communication with Converged Security Engine (CSE)
over Host Embedded Controller Interface (HECI)
config SOC_INTEL_COMMON_BLOCK_HECI_DISABLE_IN_SMM
bool
default y if HECI_DISABLE_USING_SMM
select SOC_INTEL_COMMON_BLOCK_P2SB
help
Use this config to include common CSE block to make HECI function
disable in SMM mode
config SOC_INTEL_CSE_LITE_SKU
bool
default n
help
Enables CSE Lite SKU
config SOC_INTEL_CSE_RW_UPDATE
bool "Enable the CSE RW Update Feature"
default n
depends on SOC_INTEL_CSE_LITE_SKU
help
This config will enable CSE RW firmware update feature and also will be used ensure
all the required configs are provided by mainboard.
config SOC_INTEL_CSE_FMAP_NAME
string "Name of CSE Region in FMAP" if SOC_INTEL_CSE_RW_UPDATE
default "SI_ME"
help
Name of CSE region in FMAP
config SOC_INTEL_CSE_RW_A_FMAP_NAME
string "Location of CSE RW A in FMAP" if SOC_INTEL_CSE_RW_UPDATE
default "ME_RW_A"
help
Name of CSE RW A region in FMAP
config SOC_INTEL_CSE_RW_B_FMAP_NAME
string "Location of CSE RW B in FMAP" if SOC_INTEL_CSE_RW_UPDATE
default "ME_RW_B"
help
Name of CSE RW B region in FMAP
config SOC_INTEL_CSE_RW_CBFS_NAME
string "CBFS entry name for CSE RW blob" if SOC_INTEL_CSE_RW_UPDATE
default "me_rw"
help
CBFS entry name for Intel CSE CBFS RW blob
config SOC_INTEL_CSE_RW_HASH_CBFS_NAME
string "CBFS name for CSE RW hash file" if SOC_INTEL_CSE_RW_UPDATE
default "me_rw.hash"
help
CBFS name for Intel CSE CBFS RW hash file
config SOC_INTEL_CSE_RW_VERSION_CBFS_NAME
string "CBFS name for CSE RW version file" if SOC_INTEL_CSE_RW_UPDATE
default "me_rw.version"
help
CBFS name for Intel CSE CBFS RW version file
config SOC_INTEL_CSE_RW_FILE
string "Intel CSE CBFS RW path and filename" if SOC_INTEL_CSE_RW_UPDATE && !STITCH_ME_BIN
default ""
help
Intel CSE CBFS RW blob path and file name
config SOC_INTEL_CSE_RW_VERSION
string "Intel CSE RW firmware version" if SOC_INTEL_CSE_RW_UPDATE
default ""
help
This config contains the Intel CSE RW version of the blob that is provided by
SOC_INTEL_CSE_RW_FILE config and the version must be set in the format
major.minor.hotfix.build (ex: 14.0.40.1209).
config SOC_INTEL_CSE_SET_EOP
bool
default n
select PMC_IPC_ACPI_INTERFACE
help
This config ensures coreboot will send the CSE the End-of-POST message
just prior to loading the payload. This is a security feature so the
CSE will no longer respond to Pre-Boot commands.
if STITCH_ME_BIN
config CSE_COMPONENTS_PATH
string "Path to directory containing all CSE input components to stitch"
default "3rdparty/blobs/mainboard/\$(CONFIG_MAINBOARD_DIR)/firmware"
help
This is the file path containing all the input CSE component files.
These will be used by cse_serger tool to stitch CSE image.
config CSE_FPT_FILE
string "Name of CSE FPT file"
default "cse_fpt.bin"
help
This file is the CSE input binary as released by Intel in a CSE kit.
config CSE_DATA_FILE
string "Name of CSE data file"
default "cse_data.bin"
help
This file is the CSE data binary typically generated by Intel FIT tool.
config CSE_PMCP_FILE
string "Name of PMC file"
default "pmc.bin"
help
This file is the PMC input binary as released by Intel in a CSE kit.
config CSE_IOMP_FILE
string "Name of IOM file"
default "iom.bin"
help
This file is the IOM input binary as released by Intel in a CSE kit.
config CSE_TBTP_FILE
string "Name of TBT file"
default "tbt.bin"
help
This file is the TBT input binary as released by Intel in a CSE kit.
config CSE_NPHY_FILE
string "Name of NPHY file"
default "nphy.bin"
help
This file is the NPHY input binary as released by Intel in a CSE kit.
config CSE_PCHC_FILE
string "Name of PCHC file"
default "pchc.bin"
help
This file is the PCHC input binary as released by Intel in a CSE kit.
config CSE_IUNP_FILE
string "Name of IUNIT file"
default "iunit.bin"
help
This file is the PCHC input binary as released by Intel in a CSE kit.
config CSE_BPDT_VERSION
string
help
This config indicates the BPDT version used by CSE for a given SoC.
endif
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