1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Intel Corp.
* (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <console/uart.h>
#include <device/pci.h>
#include <intelblocks/uart.h>
#include <soc/gpio.h>
#include <soc/uart.h>
#include <soc/pci_devs.h>
static inline int invalid_uart_for_console(void)
{
/* There are actually only 2 UARTS, and they are named UART1 and
* UART2. They live at pci functions 1 and 2 respectively. */
if (CONFIG_UART_FOR_CONSOLE > 2 || CONFIG_UART_FOR_CONSOLE < 1)
return 1;
return 0;
}
uintptr_t uart_platform_base(int idx)
{
return CONFIG_CONSOLE_UART_BASE_ADDRESS;
}
static const struct pad_config uart_gpios[] = {
PAD_CFG_NF(GPIO_42, NATIVE, DEEP, NF1), /* UART1 RX */
PAD_CFG_NF(GPIO_43, NATIVE, DEEP, NF1), /* UART1 TX */
PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* UART2 RX */
PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1), /* UART2 TX */
};
void pch_uart_init(void)
{
uintptr_t base = CONFIG_CONSOLE_UART_BASE_ADDRESS;
device_t uart = _PCH_DEV(UART, CONFIG_UART_FOR_CONSOLE & 3);
/* Get a 0-based pad index. See invalid_uart_for_console() above. */
const int pad_index = CONFIG_UART_FOR_CONSOLE - 1;
if (invalid_uart_for_console())
return;
/* Configure the 2 pads per UART. */
gpio_configure_pads(&uart_gpios[pad_index * 2], 2);
/* Program UART2 BAR0, command, reset and clock register */
uart_common_init(uart, base, CLK_M_VAL, CLK_N_VAL);
}
|
