blob: 97a012e03fe5e5f7d7834385151e8961c3ca5e39 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/gpio_banks.h>
#include <bootstate.h>
#include <device/device.h>
#include <drivers/usb/pci_xhci/pci_xhci.h>
#include <soc/pci_devs.h>
#include <soc/smi.h>
#include <soc/soc_util.h>
static const struct sci_source xhci_sci_sources[] = {
{
.scimap = SMITYPE_XHC0_PME,
.gpe = GEVENT_31,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
},
{
.scimap = SMITYPE_XHC1_PME,
.gpe = GEVENT_31,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
}
};
enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
{
if (dev->bus->dev->path.type != DEVICE_PATH_PCI)
return CB_ERR_ARG;
if (dev->bus->dev->path.pci.devfn != PCIE_GPP_A_DEVFN)
return CB_ERR_ARG;
if (dev->path.type != DEVICE_PATH_PCI)
return CB_ERR_ARG;
if (dev->path.pci.devfn == XHCI0_DEVFN)
*gpe = xhci_sci_sources[0].gpe;
else if (dev->path.pci.devfn == XHCI1_DEVFN)
*gpe = xhci_sci_sources[1].gpe;
else
return CB_ERR_ARG;
return CB_SUCCESS;
}
static void configure_xhci_sci(void *unused)
{
if (soc_is_reduced_io_sku())
gpe_configure_sci(xhci_sci_sources, 1);
else
gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources));
}
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL);
|
