summaryrefslogtreecommitdiff
path: root/src/soc/amd/common/block/psp/Kconfig
blob: bf0477b5ac36696c36dc372d971b1ff56f173739 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
config SOC_AMD_COMMON_BLOCK_PSP
	bool
	default n
	help
	  This option builds in the Platform Security Processor initialization
	  functions. Do not select this directly in SoC code, select
	  SOC_AMD_COMMON_BLOCK_PSP_GENx instead.

config SOC_AMD_COMMON_BLOCK_PSP_GEN1
	bool
	default n
	select SOC_AMD_COMMON_BLOCK_PSP
	help
	  Used by the PSP in AMD systems before fam17h, e.g. stoneyridge.

config SOC_AMD_COMMON_BLOCK_PSP_GEN2
	bool
	default n
	select SOC_AMD_COMMON_BLOCK_PSP
	help
	  Used by the PSP in AMD fam17h CPUs and possibly newer ones.

config SOC_AMD_PSP_SELECTABLE_SMU_FW
	bool
	default n
	help
	  Some PSP implementations allow storing SMU firmware into cbfs and
	  calling the PSP to load the blobs at the proper time.

	  The soc/<codename> should select this if its PSP supports the feature
	  and each mainboard can choose to select an appropriate fanless or
	  fanned set of blobs.  Ask your AMD representative whether your APU
	  is considered fanless.