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config SOC_AMD_COMMON_BLOCK_CAR
bool
help
This option allows the SOC to use a standard AMD cache-as-ram (CAR)
implementation. CAR setup is built into bootblock and teardown is
in postcar. The teardown procedure does not preserve the stack so
it may not be appropriate for a romstage implementation without
additional consideration. If this option is not used, the SOC must
implement these functions separately.
This is only used for AMD CPU before family 17h. From family 17h on
the RAM is already initialized by the PSP before the x86 cores are
released from reset.
config SOC_AMD_COMMON_BLOCK_NONCAR
bool
help
From family 17h on AMD CPUs/APUs don't use cache as RAM (CAR) any
more, since the RAM initialization is already done by the PSP when
the x86 cores are released from reset.
if SOC_AMD_COMMON_BLOCK_NONCAR
config MEMLAYOUT_LD_FILE
string
default "src/soc/amd/common/block/cpu/noncar/memlayout.ld"
config PAYLOAD_PRELOAD_CACHE_SIZE
hex
default 0x30000
depends on PAYLOAD_PRELOAD
help
This config sets the size of the payload_preload_cache memory region.
It is used as the destination for the raw payload. This space is only
populated during non-S3, so it doesn't need to be reserved in the
EARLY_RESERVED_DRAM region.
endif # SOC_AMD_COMMON_BLOCK_NONCAR
config SOC_AMD_COMMON_BLOCK_MCA_COMMON
bool
help
Add common machine check architecture support. Do not select this
in the SoC's Kconfig; select either SOC_AMD_COMMON_BLOCK_MCA or
SOC_AMD_COMMON_BLOCK_MCAX which will select this one.
config SOC_AMD_COMMON_BLOCK_MCA
bool
select SOC_AMD_COMMON_BLOCK_MCA_COMMON
help
Add IA32 machine check architecture (MCA) support for pre-Zen CPUs.
config SOC_AMD_COMMON_BLOCK_MCAX
bool
select SOC_AMD_COMMON_BLOCK_MCA_COMMON
help
Add extended machine check architecture (MCAX) support for AMD family
17h, 19h and possibly newer CPUs.
config SOC_AMD_COMMON_BLOCK_SMM
bool
help
Add common SMM relocation, finalization and handler functionality to
the build.
config SOC_AMD_COMMON_BLOCK_TSC_FAM17H_19H
bool
select COLLECT_TIMESTAMPS_NO_TSC # selected use SoC-specific timestamp function
select TSC_SYNC_LFENCE
select UDELAY_TSC
help
Select this option to add the common functions for getting the TSC
frequency of AMD family 17h and 19h CPUs/APUs and to provide TSC-
based monotonic timer functionality to the build.
config SOC_AMD_COMMON_BLOCK_UCODE
bool
select SUPPORT_CPU_UCODE_IN_CBFS
help
Builds in support for loading uCode.
config SOC_AMD_COMMON_BLOCK_UCODE_SIZE
int
depends on SOC_AMD_COMMON_BLOCK_UCODE
help
Defines the size of the uCode binary in bytes.
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