summaryrefslogtreecommitdiff
path: root/src/soc/amd/common/block/acpi/gpio.c
blob: 7e7503bfe594def613dc39b8ad85b64b181ebf78 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
/* SPDX-License-Identifier: GPL-2.0-only */

#include <acpi/acpigen.h>
#include <console/console.h>
#include <gpio.h>

static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
{
	if (gpio_num >= SOC_GPIO_TOTAL_PINS) {
		printk(BIOS_WARNING, "Pin %d should be smaller than"
					" %d\n", gpio_num, SOC_GPIO_TOTAL_PINS);
		return -1;
	}
	if (SOC_GPIO_TOTAL_PINS >= AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER &&
			gpio_num >= SOC_GPIO_TOTAL_PINS) {
		printk(BIOS_WARNING, "Pin %d is a remote GPIO which isn't supported"
			" yet.\n", gpio_num);
		return -1;
	}
	/* op (gpio_num) */
	acpigen_emit_namestring(op);
	acpigen_write_integer(gpio_num);
	return 0;
}

static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num)
{
	if (gpio_num >= SOC_GPIO_TOTAL_PINS) {
		printk(BIOS_WARNING, "Pin %d should be smaller than"
					" %d\n", gpio_num, SOC_GPIO_TOTAL_PINS);
		return -1;
	}
	if (SOC_GPIO_TOTAL_PINS >= AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER &&
			gpio_num >= SOC_GPIO_TOTAL_PINS) {
		printk(BIOS_WARNING, "Pin %d is a remote GPIO which isn't supported"
			" yet.\n", gpio_num);
		return -1;
	}
	/* Store (op (gpio_num), Local0) */
	acpigen_write_store();
	acpigen_soc_gpio_op(op, gpio_num);
	acpigen_emit_byte(LOCAL0_OP);
	return 0;
}

int acpigen_soc_read_rx_gpio(unsigned int gpio_num)
{
	return acpigen_soc_get_gpio_state("\\_SB.GRXS", gpio_num);
}

int acpigen_soc_get_tx_gpio(unsigned int gpio_num)
{
	return acpigen_soc_get_gpio_state("\\_SB.GTXS", gpio_num);
}

int acpigen_soc_set_tx_gpio(unsigned int gpio_num)
{
	return acpigen_soc_gpio_op("\\_SB.STXS", gpio_num);
}

int acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
{
	return acpigen_soc_gpio_op("\\_SB.CTXS", gpio_num);
}