blob: 9355f7d455adf61c7a860e0af5374882527b08ce (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
|
config SOC_AMD_COMMON_BLOCK_ACPI
bool
depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO
select ACPI_AMD_HARDWARE_SLEEP_VALUES
select ACPI_COMMON_MADT_IOAPIC
select ACPI_COMMON_MADT_LAPIC
select ACPI_CUSTOM_MADT
help
Select this option to use the AcpiMmio ACPI registers.
config SOC_AMD_COMMON_BLOCK_ACPI_ALIB
bool
config SOC_AMD_COMMON_BLOCK_ACPI_DPTC
bool
depends on SOC_AMD_COMMON_BLOCK_ACPI_ALIB
help
Selected by mainboards that implement support for ALIB
to enable DPTC.
config SOC_AMD_COMMON_BLOCK_ACPI_CPPC
bool
config SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE
bool
config SOC_AMD_COMMON_BLOCK_ACPI_GPIO
bool
config SOC_AMD_COMMON_BLOCK_ACPI_IVRS
bool
config ACPI_SSDT_PSD_INDEPENDENT
bool "Allow core p-state independent transitions"
default y
help
AMD recommends the ACPI _PSD object to be configured to cause
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
|
