blob: 4ab03d0f362b49d26000737d7ba38e1113046f23 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <soc/amd/common/acpi/pci_root.asl>
#include "globalnvs.asl"
Scope(\_SB) {
/* global utility methods expected within the \_SB scope */
#include <arch/x86/acpi/globutil.asl>
#include <soc/amd/common/acpi/gpio_bank_lib.asl>
#include <soc/amd/common/acpi/osc.asl>
#include "pci_int_defs.asl"
#include <soc/amd/common/acpi/pci_int.asl>
#include "mmio.asl"
ROOT_BRIDGE(PCI0)
Scope(PCI0) {
#include <soc/amd/common/acpi/lpc.asl>
} /* End PCI0 scope */
} /* End \_SB scope */
#include <soc/amd/common/acpi/alib.asl>
#include <soc/amd/common/acpi/platform.asl>
#include <soc/amd/common/acpi/sleepstates.asl>
#include <soc/amd/common/acpi/upep.asl>
#if CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)
#include <soc/amd/common/acpi/dptc.asl>
#endif
#include "rtc_workaround.asl"
/*
* Platform Notify
*
* This is called by soc/amd/common/acpi/platform.asl.
*/
Method (PNOT)
{
/* Report AC/DC state to ALIB using WAL1() */
\WAL1 ()
}
|