1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 One Laptop per Child, Association, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr);
void SetDQSOutputCHB(DRAM_SYS_ATTR * DramAttr);
/*===================================================================
Function : DRAMDQSOutputSearchCHA()
Precondition :
Input :
DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
in MotherBoard
Output : Void
Purpose : set DQS output delay register reg70 and DQ output delay register reg71
===================================================================*/
#define CH_A 0
#define CH_B 1
void DRAMDQSOutputSearch(DRAM_SYS_ATTR * DramAttr)
{
if (DramAttr->RankNumChA > 0)
SetDQSOutputCHA(DramAttr);
}
/*===================================================================
Function : SetDQSOutputCHA()
Precondition :
Input :
DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
in MotherBoard
Output : Void
Purpose : according the frequence set CHA DQS output
===================================================================*/
void SetDQSOutputCHA(DRAM_SYS_ATTR * DramAttr)
{
u8 Reg70, Reg71;
u8 Index;
if (DramAttr->DramFreq == DIMMFREQ_400)
Index = 3;
else if (DramAttr->DramFreq == DIMMFREQ_533)
Index = 2;
else if (DramAttr->DramFreq == DIMMFREQ_667)
Index = 1;
else if (DramAttr->DramFreq == DIMMFREQ_800)
Index = 0;
else
Index = 3;
if (DramAttr->RankNumChA > 2) {
Reg70 = Fixed_DQSA_3_4_Rank_Table[Index][0];
Reg71 = Fixed_DQSA_3_4_Rank_Table[Index][1];
} else {
Reg70 = Fixed_DQSA_1_2_Rank_Table[Index][0];
Reg71 = Fixed_DQSA_1_2_Rank_Table[Index][1];
}
pci_write_config8(MEMCTRL, 0x70, Reg70);
pci_write_config8(MEMCTRL, 0x71, Reg71);
}
//################
// STEP 12 #
//################
/*===================================================================
Function : DRAMDQSInputSearch()
Precondition :
Input :
DramAttr: pointer point to DRAM_SYS_ATTR which consist the DDR and Dimm information
in MotherBoard
Output : Void
Purpose : search DQS input delay for CHA/CHB
===================================================================*/
void DRAMDQSInputSearch(DRAM_SYS_ATTR * DramAttr)
{
u8 Data;
//auto mode
Data = 0x0;
pci_write_config8(MEMCTRL, 0x77, Data);
}
|