blob: 328464a44092fa0963fec747e91b66d4f4dac1a6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
|
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <arch/bootblock.h>
#include <device/pci_ops.h>
#include "x4x.h"
#include "iomap.h"
void bootblock_early_northbridge_init(void)
{
uint32_t reg32;
/* Disable LaGrande Technology (LT) */
reg32 = TPM32(0);
reg32 = CONFIG_MMCONF_BASE_ADDRESS | 16 | 1;
pci_io_write_config32(HOST_BRIDGE, D0F0_PCIEXBAR_LO, reg32);
}
|
