blob: 716a015fbf6649380cf64ac759322ae102d6ea63 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
|
##
## This file is part of the coreboot project.
##
## Copyright (C) 2007-2009 coresystems GmbH
## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
config NORTHBRIDGE_INTEL_X4X
bool
if NORTHBRIDGE_INTEL_X4X
config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select HAVE_DEBUG_RAM_SETUP
select VGA
select INTEL_GMA_ACPI
select RELOCATABLE_RAMSTAGE
config CBFS_SIZE
hex
default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/intel/x4x/bootblock.c"
config VGA_BIOS_ID
string
default "8086,2e32"
endif
|
