blob: 9c1a111456830276c767d16026c259a039c4d03c (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
|
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_I945
bool
select HAVE_DEBUG_RAM_SETUP
select VGA
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
select INTEL_EDID
select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
select USE_DDR2
if NORTHBRIDGE_INTEL_I945
config VBOOT
select VBOOT_STARTS_IN_BOOTBLOCK
config NORTHBRIDGE_INTEL_SUBTYPE_I945GC
def_bool n
config NORTHBRIDGE_INTEL_SUBTYPE_I945GM
def_bool n
config VGA_BIOS_ID
string
default "8086,27a2" if NORTHBRIDGE_INTEL_SUBTYPE_I945GM
default "8086,2772" if NORTHBRIDGE_INTEL_SUBTYPE_I945GC
config I945_LVDS
def_bool n
select MAINBOARD_HAS_NATIVE_VGA_INIT
select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT
help
Selected by mainboards that use native graphics initialization
for the LVDS port. A linear framebuffer is only supported for
LVDS.
config ECAM_MMCONF_BASE_ADDRESS
default 0xf0000000
config ECAM_MMCONF_BUS_NUMBER
int
default 64
config OVERRIDE_CLOCK_DISABLE
bool
default n
help
Usually system firmware turns off system memory clock
signals to unused SO-DIMM slots to reduce EMI and power
consumption.
However, some boards do not like unused clock signals to
be disabled.
config MAXIMUM_SUPPORTED_FREQUENCY
int
default 0
help
If non-zero, this designates the maximum DDR frequency
the board supports, despite what the chipset should be
capable of.
config CHECK_SLFRCS_ON_RESUME
def_bool n
help
On some boards it may be necessary to hard reset early
during resume from S3 if the SLFRCS register indicates that
a memory channel is not guaranteed to be in self-refresh.
On other boards the check always creates a false positive,
effectively making it impossible to resume.
config SMM_RESERVED_SIZE
hex
default 0x100000
config MAX_CPUS
int
default 4
config FIXED_MCHBAR_MMIO_BASE
default 0xfed14000
config FIXED_DMIBAR_MMIO_BASE
default 0xfed18000
config FIXED_EPBAR_MMIO_BASE
default 0xfed19000
endif
|
