blob: d8a81934fc66ecc508b185b9e118647ede5a3d93 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
|
# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_I440BX
bool
select NO_MMCONF_SUPPORT
select HAVE_DEBUG_RAM_SETUP
select NO_BOOTBLOCK_CONSOLE
config SDRAMPWR_4DIMM
bool
depends on NORTHBRIDGE_INTEL_I440BX
default n
help
This option affects how the SDRAMC register is programmed.
Memory clock signals will not be routed properly if this option
is set wrong.
If your board has 4 DIMM slots, you must use select this option, in
your Kconfig file of the board. On boards with 3 DIMM slots,
do _not_ select this option.
|
