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# This file is part of the coreboot project.
# SPDX-License-Identifier: GPL-2.0-only
config NORTHBRIDGE_INTEL_GM45
bool
if NORTHBRIDGE_INTEL_GM45
config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select HAVE_DEBUG_RAM_SETUP
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI
select INTEL_GMA_SSC_ALTERNATE_REF
select PARALLEL_MP
config VBOOT
select VBOOT_STARTS_IN_BOOTBLOCK
select VBOOT_SEPARATE_VERSTAGE
config CBFS_SIZE
hex
default 0x100000
config VGA_BIOS_ID
string
default "8086,2a42"
config MMCONF_BASE_ADDRESS
hex
default 0xf0000000
config SMM_RESERVED_SIZE
hex
default 0x100000
config INTEL_GMA_BCLV_OFFSET
default 0x61254
config INTEL_GMA_BCLM_OFFSET
default 0x61256
endif
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