blob: 1c785904c69d24754e3fc0c39b38d1d63519acc7 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
|
##
## This file is part of the coreboot project.
##
## Copyright (C) 2007-2009 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config NORTHBRIDGE_AMD_AMDFAM10
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HAVE_DEBUG_CAR
select HYPERTRANSPORT_PLUGIN_SUPPORT
select MMCONF_SUPPORT
select PER_DEVICE_ACPI_TABLES
select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_AMDFAM10
config AGP_APERTURE_SIZE
hex
default 0x4000000
config HT3_SUPPORT
bool
default y
config AMDMCT
bool
default y
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
config MMCONF_BASE_ADDRESS
hex
default 0xe0000000
config MMCONF_BUS_NUMBER
int
default 256
# TODO: Reservation for heap seems excessive
config HEAP_SIZE
hex
default 0xc0000
config RAMTOP
hex
default 0x400000
config BOOTBLOCK_NORTHBRIDGE_INIT
string
default "northbridge/amd/amdfam10/bootblock.c"
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
bool
default n
config DIMM_FBDIMM
bool
default n
config DIMM_DDR2
bool
default n
config DIMM_DDR3
bool
default n
config DIMM_REGISTERED
bool
default n
if DIMM_FBDIMM
config DIMM_SUPPORT
hex
default 0x0110
endif
if DIMM_DDR2
if DIMM_REGISTERED
config DIMM_SUPPORT
hex
default 0x0104
endif
if !DIMM_REGISTERED
config DIMM_SUPPORT
hex
default 0x0004
endif
endif
if DIMM_DDR3
if DIMM_REGISTERED
config DIMM_SUPPORT
hex
default 0x0005
endif
endif
config SVI_HIGH_FREQ
bool
default n
help
Select this for boards with a Voltage Regulator able to operate
at 3.4 MHz in SVI mode. Ignored unless the AMD CPU is rev C3.
menu "HyperTransport setup"
#could be implemented for K8 (NORTHBRIDGE_AMD_AMDK8)
depends on (NORTHBRIDGE_AMD_AMDFAM10) && EXPERT
choice
prompt "HyperTransport frequency"
default LIMIT_HT_SPEED_AUTO
help
This option sets the maximum permissible HyperTransport link
frequency.
Use of this option will only limit the autodetected HT frequency.
It will not (and cannot) increase the frequency beyond the
autodetected limits.
This is primarily used to work around poorly designed or laid out
HT traces on certain motherboards.
config LIMIT_HT_SPEED_200
bool "Limit HT frequency to 200MHz"
config LIMIT_HT_SPEED_300
bool "Limit HT frequency to 300MHz"
config LIMIT_HT_SPEED_400
bool "Limit HT frequency to 400MHz"
config LIMIT_HT_SPEED_500
bool "Limit HT frequency to 500MHz"
config LIMIT_HT_SPEED_600
bool "Limit HT frequency to 600MHz"
config LIMIT_HT_SPEED_800
bool "Limit HT frequency to 800MHz"
config LIMIT_HT_SPEED_1000
bool "Limit HT frequency to 1.0GHz"
config LIMIT_HT_SPEED_1200
bool "Limit HT frequency to 1.2GHz"
config LIMIT_HT_SPEED_1400
bool "Limit HT frequency to 1.4GHz"
config LIMIT_HT_SPEED_1600
bool "Limit HT frequency to 1.6GHz"
config LIMIT_HT_SPEED_1800
bool "Limit HT frequency to 1.8GHz"
config LIMIT_HT_SPEED_2000
bool "Limit HT frequency to 2.0GHz"
config LIMIT_HT_SPEED_2200
bool "Limit HT frequency to 2.2GHz"
config LIMIT_HT_SPEED_2400
bool "Limit HT frequency to 2.4GHz"
config LIMIT_HT_SPEED_2600
bool "Limit HT frequency to 2.6GHz"
config LIMIT_HT_SPEED_AUTO
bool "Autodetect HT frequency"
endchoice
choice
prompt "HyperTransport downlink width"
default LIMIT_HT_DOWN_WIDTH_16
help
This option sets the maximum permissible HyperTransport
downlink width.
Use of this option will only limit the autodetected HT width.
It will not (and cannot) increase the width beyond the autodetected
limits.
This is primarily used to work around poorly designed or laid out HT
traces on certain motherboards.
config LIMIT_HT_DOWN_WIDTH_8
bool "8 bits"
config LIMIT_HT_DOWN_WIDTH_16
bool "16 bits"
endchoice
choice
prompt "HyperTransport uplink width"
default LIMIT_HT_UP_WIDTH_16
help
This option sets the maximum permissible HyperTransport
uplink width.
Use of this option will only limit the autodetected HT width.
It will not (and cannot) increase the width beyond the autodetected
limits.
This is primarily used to work around poorly designed or laid out HT
traces on certain motherboards.
config LIMIT_HT_UP_WIDTH_8
bool "8 bits"
config LIMIT_HT_UP_WIDTH_16
bool "16 bits"
endchoice
config AMDMCT_ENABLE_ECC_REDIR
bool
depends on CPU_AMD_MODEL_10XXX
default n
config AMDMCT_BACKGROUND_SCRUB_RATE
hex
depends on CPU_AMD_MODEL_10XXX
default 0x00
help
This option sets the background ECC memory scub rate
Permissible values are:
0x00; Disabled
0x01; 40ns
0x02; 80ns
0x03; 160ns
0x04; 320ns
0x05; 640ns
0x06; 1.28us
0x07; 2.56us
0x08; 5.12us
0x09; 10.2us
0x0a; 20.5us
0x0b; 41us
0x0c; 81.9us
0x0d; 163.8us
0x0e; 327.7us
0x0f; 655.4us
0x10; 1.31ms
0x11; 2.62ms
0x12; 5.24ms
0x13; 10.49ms
0x14; 20.97sms
0x15; 42ms
0x16; 84ms
endmenu
endif # NORTHBRIDGE_AMD_AMDFAM10
|