blob: 244c133ec065f2ea363ab8d476cb9da875296a94 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
##
## This file is part of the coreboot project.
##
## Copyright (C) 2007-2009 coresystems GmbH
## Copyright (C) 2011 Advanced Micro Devices, Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config NORTHBRIDGE_AMD_AGESA_FAMILY10
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HYPERTRANSPORT_PLUGIN_SUPPORT
select MMCONF_SUPPORT
if NORTHBRIDGE_AMD_AGESA_FAMILY10
config HT3_SUPPORT
bool
default y
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
config MMCONF_BASE_ADDRESS
hex
default 0xE0000000
config MMCONF_BUS_NUMBER
int
default 256
endif #NORTHBRIDGE_AMD_AGESA_FAMILY10
|
