summaryrefslogtreecommitdiff
path: root/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
blob: 6fd27bf547b45aa589e19bb7963a1be36acc71b8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
chip soc/intel/tigerlake
	# FSP UPDs
	register "eist_enable"			= "true"
	register "enable_c6dram"		= "1"
	register "CnviBtCore"			= "true"
	register "CnviBtAudioOffload"		= "1"
	register "SaGv"				= "SaGv_Enabled"

	# Graphics
	# Not used but timings left for reference
	# register "panel_cfg" = "{
	#	.up_delay_ms			= 2000,				// T3
	#	.backlight_on_delay_ms		= 0,				// T7
	#	.backlight_off_delay_ms		= 2000,				// T9
	#	.down_delay_ms			= 500,				// T10
	#	.cycle_delay_ms			= 500,				// T12
	#	.backlight_pwm_hz		= 200,				// PWM
	# }"

	# Serial I/O
	register "SerialIoI2cMode" = "{
		[PchSerialIoIndexI2C0]		= PchSerialIoPci,
		[PchSerialIoIndexI2C4]		= PchSerialIoSkipInit,
	}"

	register "SerialIoUartMode" = "{
		[PchSerialIoIndexUART2]		= PchSerialIoSkipInit,
	}"

	# Power
	register "PchPmSlpS3MinAssert"		= "2"				# 50ms
	register "PchPmSlpS4MinAssert"		= "3"				# 1s
	register "PchPmSlpSusMinAssert"		= "3"				# 500ms
	register "PchPmSlpAMinAssert"		= "3"				# 2s

	# Enable the correct decode ranges on the LPC bus.
	register "lpc_ioe"			= "LPC_IOE_EC_4E_4F |
						   LPC_IOE_SUPERIO_2E_2F |
						   LPC_IOE_KBC_60_64 |
						   LPC_IOE_EC_62_66 |
						   LPC_IOE_LGE_200"

	# PCIe Clock
	register "PcieClkSrcClkReq[0]"		= "PCIE_CLK_NOTUSED"
	register "PcieClkSrcClkReq[1]"		= "PCIE_CLK_NOTUSED"
	register "PcieClkSrcClkReq[2]"		= "PCIE_CLK_NOTUSED"
	register "PcieClkSrcClkReq[4]"		= "PCIE_CLK_NOTUSED"
	register "PcieClkSrcClkReq[5]"		= "PCIE_CLK_NOTUSED"
	register "PcieClkSrcClkReq[6]"		= "PCIE_CLK_NOTUSED"

# Actual device tree.
	device domain 0 on
		device ref igpu		on  end
		device ref tbt_pcie_rp0	on  end
		device ref gna		on  end
		device ref crashlog	on  end
		device ref north_xhci	on
			register "UsbTcPortEn"			= "1"
			register "TcssXhciEn"			= "1"
			register "TcssAuxOri"			= "0"
			chip drivers/usb/acpi
				device ref tcss_root_hub on
					chip drivers/usb/acpi
						register "desc" = ""USB Type-C""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						device ref tcss_usb3_port1 on end
					end
				end
			end
		end
		device ref tbt_dma0	on
			chip drivers/intel/usb4/retimer
				register "dfp[0].power_gpio"	= "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)"
				use tcss_usb3_port1 as dfp[0].typec_port
				device generic 0 on end
			end
		end
		device ref south_xhci	on
			# Motherboard USB Type C
			register "usb2_ports[0]"		= "USB2_PORT_TYPE_C(OC_SKIP)"
			register "tcss_ports[0]"		= "TCSS_PORT_DEFAULT(OC_SKIP)"

			# Motherboard USB 3.0
			register "usb2_ports[1]"		= "USB2_PORT_MID(OC_SKIP)"
			register "usb3_ports[0]"		= "USB3_PORT_DEFAULT(OC_SKIP)"

			# Daughterboard USB 3.0
			register "usb2_ports[2]"		= "USB2_PORT_MID(OC_SKIP)"
			register "usb3_ports[1]"		= "USB3_PORT_DEFAULT(OC_SKIP)"

			# Daughterboard SD Card
			register "usb2_ports[5]"		= "USB2_PORT_MID(OC_SKIP)"

			# Webcam
			register "usb2_ports[CONFIG_CCD_PORT]"	= "USB2_PORT_MID(OC_SKIP)"

			# Internal Bluetooth
			register "usb2_ports[9]"		= "USB2_PORT_MID(OC_SKIP)"

			chip drivers/usb/acpi
				device ref xhci_root_hub on
					chip drivers/usb/acpi
						register "desc"		= ""USB Type-C""
						register "type"		= "UPC_TYPE_C_USB2_SS_SWITCH"
						device ref usb2_port1 on end
					end
					chip drivers/usb/acpi
						register "desc"		= ""Left USB Type-A""
						register "type"		= "UPC_TYPE_USB3_A"
						device ref usb2_port2 on end
					end
					chip drivers/usb/acpi
						register "desc"		= ""Left USB Type-A""
						register "type"		= "UPC_TYPE_USB3_A"
						device ref usb3_port1 on end
					end
					chip drivers/usb/acpi
						register "desc"		= ""Right USB Type-A""
						register "type"		= "UPC_TYPE_USB3_A"
						device ref usb2_port3 on end
					end
					chip drivers/usb/acpi
						register "desc"		= ""Right USB Type-A""
						register "type"		= "UPC_TYPE_USB3_A"
						device ref usb3_port2 on end
					end
					chip drivers/usb/acpi
						register "desc"		= ""Internal Webcam""
						register "type"		= "UPC_TYPE_INTERNAL"
						device ref usb2_port4 on end
					end
					chip drivers/usb/acpi
						register "desc"		= ""MicroSD Card Reader""
						register "type"		= "UPC_TYPE_INTERNAL"
						device ref usb2_port6 on end
					end
					chip drivers/usb/acpi
						register "desc"		= ""Internal Bluetooth""
						register "type"		= "UPC_TYPE_INTERNAL"
						device ref usb2_port10 on end
					end
				end
			end
		end
		device ref shared_ram	on  end
		device ref cnvi_wifi	on
			chip drivers/wifi/generic
				register "wake"			= "GPE0_PME_B0"
				device generic 0 on end
			end
		end
		device ref i2c0		on
			chip drivers/i2c/hid
				register "generic.hid"		= ""STAR0001""
				register "generic.desc"		= ""Touchpad""
				register "generic.irq"		= "ACPI_IRQ_LEVEL_LOW(GPP_C8_IRQ)"
				register "generic.detect"	= "1"
				register "hid_desc_reg_offset"	= "0x20"
				device i2c 2c on end
			end
		end
		device ref heci1	on  end
		device ref sata		on
			register "SataSalpSupport"		= "1"
			# Port 1
			register "SataPortsEnable[1]"		= "1"
			register "SataPortsDevSlp[1]"		= "1"
		end
		device ref i2c4		on  end
		device ref uart2	on  end
		device ref pcie_rp9	on
			register "HybridStorageMode"		= "0"
			register "PcieRpLtrEnable[8]"		= "1"
			register "PcieClkSrcUsage[3]"		= "0x08"
			register "PcieClkSrcClkReq[3]"		= "3"
			register "PcieRpSlotImplemented[8]"	= "1"
			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
			chip soc/intel/common/block/pcie/rtd3
				register "enable_gpio"		= "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)"
				register "reset_gpio"		= "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)"
				register "srcclk_pin"		= "3"
				device generic 0 on end
			end
		end
		device ref gspi1	on  end
		device ref pch_espi	on
			register "gen1_dec"			= "0x000c1641"
			register "gen2_dec"			= "0x000c0681"
			register "gen3_dec"			= "0x000c0081"
			chip drivers/pc80/tpm
				device pnp 0c31.0 on end
			end

			chip ec/starlabs/merlin
				# Port pair 4Eh/4Fh
				device pnp 4e.00 on  end			# IO Interface
				device pnp 4e.01 off end			# Com 1
				device pnp 4e.02 off end			# Com 2
				device pnp 4e.04 off end			# System Wake-Up
				device pnp 4e.05 off end			# PS/2 Mouse
				device pnp 4e.06 on				# PS/2 Keyboard
					io 0x60			= 0x0060
					io 0x62			= 0x0064
					irq 0x70		= 1
				end
				device pnp 4e.0a off end			# Consumer IR
				device pnp 4e.0f off end			# Shared Memory/Flash Interface
				device pnp 4e.10 off end			# RTC-like Timer
				device pnp 4e.11 off end			# Power Management Channel 1
				device pnp 4e.12 off end			# Power Management Channel 2
				device pnp 4e.13 off end			# Serial Peripheral Interface
				device pnp 4e.14 off end			# Platform EC Interface
				device pnp 4e.17 off end			# Power Management Channel 3
				device pnp 4e.18 off end			# Power Management Channel 4
				device pnp 4e.19 off end			# Power Management Channel 5
			end
		end
		device ref p2sb		on  end
		device ref pmc		hidden
			chip drivers/intel/pmc_mux
				device generic 0 on
					chip drivers/intel/pmc_mux/conn
						use usb2_port1 as usb2_port
						use tcss_usb3_port1 as usb3_port
						device generic 0 alias conn0 on end
					end
				end
			end
		end
		device ref hda		on
			subsystemid 0x10ec 0x1200
			register "PchHdaAudioLinkHdaEnable"	= "1"
		end
		device ref smbus	on  end
	end
end