blob: 8f7f4fdc219f82b5acbc889622dbc9c41f3d6413 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
|
##
## This file is part of the coreboot project.
##
## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
if BOARD_SIEMENS_MC_TCU3
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select SOC_INTEL_FSP_BAYTRAIL
select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select ENABLE_BUILTIN_COM1
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
select ENABLE_FSP_FAST_BOOT
select TSC_MONOTONIC_TIMER
select DRIVER_INTEL_I210
select SOC_INTEL_FSP_BAYTRAIL_MD
select USE_BLOBS
config MAINBOARD_DIR
string
default "siemens/mc_tcu3"
config MAINBOARD_PART_NUMBER
string
default "MC_TCU3 (FSP)"
config MAX_CPUS
int
default 16
config CACHE_ROM_SIZE_OVERRIDE
hex
default 0x1000000
config CBFS_SIZE
hex
default 0x00e00000
config FSP_PACKAGE_DEFAULT
bool "Configure defaults for the Intel FSP package"
default n
config VGA_BIOS
bool
default y if FSP_PACKAGE_DEFAULT
endif # BOARD_SIEMENS_MC_TCU3
|