blob: 432e8de284dd6da0e5b175bed1fd3d5d38399533 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
|
FLASH 16M {
WP_RO@0x0 0xe00000 {
SI_DESC@0x0 0x1000
IFWI@0x1000 0x23f000
RO_VPD@0x240000 0x4000
RO_SECTION@0x244000 0xbbc000 {
FMAP@0x0 0x800
RO_UNUSED_1@0x800 0x800
COREBOOT(CBFS)@0x1000 0xbb9000
RO_UNUSED_2@0xbba000 0x1000
}
}
MISC_RW@0xe00000 0x30000 {
UNIFIED_MRC_CACHE@0x0 0x21000 {
RECOVERY_MRC_CACHE@0x0 0x10000
RW_MRC_CACHE@0x10000 0x10000
RW_VAR_MRC_CACHE@0x20000 0x1000
}
RW_ELOG@0x21000 0x3000
RW_SHARED@0x24000 0x4000 {
SHARED_DATA@0x0 0x2000
VBLOCK_DEV@0x2000 0x2000
}
RW_VPD@0x28000 0x2000
RW_NVRAM@0x2a000 0x6000
}
BIOS_UNUSABLE@0xe30000 0xcf000
DEVICE_EXTENSION@0xeff000 0x100000
# Currently, it is required that the BIOS region be a multiple of 8KiB.
# This is required so that the recovery mechanism can find SIGN_CSE
# region aligned to 4K at the center of BIOS region. Since the
# descriptor at the beginning uses 4K and BIOS starts at an offset of
# 4K, a hole of 4K is created towards the end of the flash to compensate
# for the size requirement of BIOS region.
# FIT tool thus creates descriptor with following regions:
# Descriptor --> 0 to 4K
# BIOS --> 4K to 0xf7f000
# Device ext --> 0xf7f000 to 0xfff000
UNUSED_HOLE@0xfff000 0x1000
}
|