blob: 4bc9b5f007501151de9aa32ccde20326fb85edb4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
|
# SPDX-License-Identifier: GPL-2.0-only
chip soc/intel/cannonlake
# FSP configuration
register "RMT" = "0"
register "PchHdaDspEnable" = "0"
register "PchHdaAudioLinkHda" = "1"
device cpu_cluster 0 on end
device domain 0 on
device ref system_agent on end
device ref peg0 off end
device ref peg1 off end
device ref peg2 off end
device ref igpu on end
device ref dptf on end
device ref ipu off end
device ref gna off end
device ref thermal on end
device ref ufs off end
device ref gspi2 off end
device ref ish off end
device ref xhci on
# USB2
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C?
register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" # single blue
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # SIMATIC NET CP 5711
register "usb2_ports[7]" = "USB2_PORT_MID(OC1)" # upper blue
register "usb2_ports[8]" = "USB2_PORT_MID(OC4)" # lower blue
register "usb2_ports[11]" = "USB2_PORT_MID(OC_SKIP)" # STM SC?
# USB3
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" # Type-C?
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)" # upper blue
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC4)" # lower blue
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Realtek storage?
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC0)" # single blue
end
device ref xdci off end
device ref shared_sram on end
device ref cnvi_wifi off end
device ref sdxc off end
device ref i2c0 off end
device ref i2c1 off end
device ref i2c2 off end
device ref i2c3 off end
device ref heci1 on end
device ref heci2 off end
device ref csme_ider off end
device ref csme_ktr off end
device ref heci3 off end
device ref heci4 off end
device ref sata on
register "SataSalpSupport" = "1"
register "SataPortsEnable[0]" = "1" # HDD / SSD
register "SataPortsEnable[1]" = "1" # ODD
register "SataPortsEnable[3]" = "1" # HDD / SSD
register "SataPortsDevSlp[0]" = "1" # M.2
register "SataPortsDevSlp[2]" = "1" # HDD / SSD
end
device ref i2c4 off end
device ref i2c5 off end
device ref uart2 off end
device ref emmc off end
device ref pcie_rp1 off end
device ref pcie_rp2 off end
device ref pcie_rp3 off end
device ref pcie_rp4 off end
device ref pcie_rp5 on
device pci 00.0 on end # x1 i219
register "PcieRpEnable[4]" = "1"
register "PcieClkSrcUsage[4]" = "0x70"
register "PcieClkSrcClkReq[4]" = "4"
register "PcieRpSlotImplemented[4]" = "0"
end
device ref pcie_rp6 on
device pci 00.0 on end # x1 i210
register "PcieRpEnable[5]" = "1"
register "PcieClkSrcUsage[5]" = "5"
register "PcieClkSrcClkReq[5]" = "5"
register "PcieRpSlotImplemented[5]" = "0"
end
device ref pcie_rp7 on
register "PcieRpEnable[6]" = "1"
register "PcieRpSlotImplemented[6]" = "1"
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230" "SlotDataBusWidth1X"
end
device ref pcie_rp8 off end
device ref pcie_rp9 off end
device ref pcie_rp10 off end
device ref pcie_rp11 off end
device ref pcie_rp12 off end
device ref pcie_rp13 off end
device ref pcie_rp14 off end
device ref pcie_rp15 off end
device ref pcie_rp16 off end
device ref pcie_rp17 on
register "PcieRpEnable[16]" = "1"
register "PcieClkSrcUsage[7]" = "16"
register "PcieClkSrcClkReq[7]" = "7"
register "PcieRpSlotImplemented[16]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
end
device ref pcie_rp18 off end
device ref pcie_rp19 off end
device ref pcie_rp20 off end
device ref pcie_rp21 off end
device ref pcie_rp22 off end
device ref pcie_rp23 off end
device ref pcie_rp24 off end
device ref uart0 off end
device ref uart1 off end
device ref gspi0 off end
device ref gspi1 off end
device ref lpc_espi on
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
device ref p2sb hidden end
device ref pmc hidden end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
device ref gbe on end
device ref tracehub off end
end
end
|
