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FLASH@0xff800000 0x800000 {
SI_ALL@0x0 0x180000 {
SI_DESC@0x0 0x1000
SI_ME@0x1000 0x17f000
}
SI_BIOS@0x180000 0x680000 {
RW_VPD(PRESERVE)@0x0 0x1000
RW_UNUSED@0x1000 0x5f000
RW_NVRAM(PRESERVE)@0x60000 0x8000
RW_SHARED@0x68000 0x18000 {
RW_ENVIRONMENT@0x0 0x4000
RW_MRC_CACHE@0x4000 0x10000
DEV_CFG@0x14000 0x4000
}
RW_SECTION_A@0x80000 0x100000 {
VBLOCK_A@0x0 0x10000
FW_MAIN_A(CBFS)@0x10000 0x7ffc0
RW_FWID_A@0x8ffc0 0x40
RW_UNUSED_A@0x90000 0x70000
}
RW_SECTION_B@0x180000 0x100000 {
VBLOCK_B@0x0 0x10000
FW_MAIN_B(CBFS)@0x10000 0x7ffc0
RW_FWID_B@0x8ffc0 0x40
RW_UNUSED_B@0x90000 0x70000
}
RO_UNUSED_1@0x280000 0x170000
RO_VPD(PRESERVE)@0x3f0000 0x20000
RO_UNUSED_2@0x410000 0xe0000
RO_SECTION@0x4f0000 0x190000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_PADDING@0x840 0xf7c0
GBB@0x10000 0x80000
COREBOOT(CBFS)@0x90000 0x100000
}
}
}
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