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## SPDX-License-Identifier: GPL-2.0-only
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "4"
register "gfx.did" = "{ 0x80000400, 0x80000300, 0x80000301, 0x80000100, }"
# Enable Panel as eDP and configure power delays
register "gpu_panel_port_select" = "PANEL_PORT_DP_A"
register "gpu_panel_power_cycle_delay" = "6" # 500ms
register "gpu_panel_power_up_delay" = "2000" # 200ms
register "gpu_panel_power_down_delay" = "500" # 50ms
register "gpu_panel_power_backlight_on_delay" = "1" # 100us as recommended by PRM
register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms
# Set backlight PWM values for eDP
register "gpu_cpu_backlight" = "0x00000ac8"
register "gpu_pch_backlight" = "0x13120000"
register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
register "ec_present" = "1"
register "max_mem_clock_mhz" = "800"
register "usb3.mode" = "3"
register "usb3.hs_port_switch_mask" = "0xf"
register "usb3.preboot_support" = "1"
register "usb3.xhci_streams" = "1"
chip cpu/intel/model_206ax
device cpu_cluster 0 on end
register "acpi_c2" = "CPU_ACPI_C6"
register "acpi_c3" = "CPU_ACPI_DISABLED"
end
device domain 0 on
device ref host_bridge on end # host bridge
device ref igd on end # vga controller
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# LPC i/o generic decodes
register "gen1_dec" = "0x003c0a01" # ITE environment controller
register "gen2_dec" = "0x000403e9" # additional com port
register "gen3_dec" = "0x000402e9" # additional com port
# Enable both SATA ports 0, 1
register "sata_port_map" = "0x03"
# Set max SATA speed to 6.0 Gb/s (should be the default, anyway)
register "sata_interface_speed_support" = "0x3"
# Route GPI7 (EC SCI) as SCI
register "gpi7_routing" = "2"
# Enable GPE17 (GPI7) and TCO SCI
register "gpe0_en" = "0x00800040"
# Disable root port coalescing
register "pcie_port_coalesce" = "false"
register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 1, 1 }"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0f"
register "superspeed_capable_ports" = "0x0f"
register "usb_port_config" = "{
{ 1, 1, 0 }, /* P00: 1st (left) USB3 (OC #0) */
{ 1, 1, 0 }, /* P01: 2nd (left) USB3 (OC #0) */
{ 1, 1, 1 }, /* P02: 1st Multibay USB3 (OC #1) */
{ 1, 1, 1 }, /* P03: 2nd Multibay USB3 (OC #1) */
{ 1, 0, 8 }, /* P04: MiniPCIe 1 USB2 (no OC) */
{ 1, 0, 8 }, /* P05: MiniPCIe 2 USB2 (no OC) */
{ 1, 0, 8 }, /* P06: USB Hub x4 USB2 (no OC) */
{ 1, 0, 8 }, /* P07: MiniPCIe 4 USB2 (no OC) */
{ 1, 1, 8 }, /* P08: SD card reader USB2 (no OC) */
{ 1, 1, 4 }, /* P09: 3rd (right) USB2 (OC #4) */
{ 1, 0, 5 }, /* P10: 4th (right) USB2 (OC #5) */
{ 1, 0, 8 }, /* P11: 3rd Multibay USB2 (no OC) */
{ 1, 1, 8 }, /* P12: misc internal USB2 (no OC) */
{ 1, 1, 6 }, /* P13: misc internal USB2 (OC #6) */
}"
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005"
device ref xhci on end # USB 3.0 Controller
device ref mei1 on end # Management Engine Interface 1
device ref mei2 off end # Management Engine Interface 2
device ref me_ide_r off end # Management Engine IDE-R
device ref me_kt off end # Management Engine KT
device ref gbe on end # Intel Gigabit Ethernet
device ref ehci2 on end # USB2 EHCI #2
device ref hda on # High Definition Audio
subsystemid 0x1a86 0x4352
end
# Disabling 1c.0 might break IRQ settings as it enables port coalescing
device ref pcie_rp1 on end # PCIe Port #1
device ref pcie_rp2 on end # PCIe Port #2
device ref pcie_rp3 on end # PCIe Port #3
device ref pcie_rp4 on end # PCIe Port #4
device ref pcie_rp5 on end # PCIe Port #5
device ref pcie_rp6 on end # PCIe Port #6
device ref pcie_rp7 on end # PCIe Port #7
device ref pcie_rp8 on end # PCIe Port #8
device ref ehci1 on end # USB2 EHCI #1
device ref pci_bridge off end # PCI bridge
device ref lpc on # LPC bridge
chip ec/roda/it8518
register "cpuhot_limit" = "100"
# 60h/64h KBC
device pnp ff.0 on # dummy address
end
end
chip superio/ite/it8783ef
register "TMPIN1.mode" = "THERMAL_RESISTOR"
register "TMPIN2.mode" = "THERMAL_RESISTOR"
register "ec.vin_mask" = "VIN_ALL"
register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
register "FAN1.smart.tmpin" = " 1"
register "FAN1.smart.tmp_off" = "60"
register "FAN1.smart.tmp_start" = "64"
register "FAN1.smart.tmp_delta" = " 2"
register "FAN1.smart.pwm_start" = "30"
register "FAN1.smart.slope" = "64"
register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
register "FAN2.smart.tmpin" = " 1"
register "FAN2.smart.tmp_off" = "60"
register "FAN2.smart.tmp_start" = "64"
register "FAN2.smart.tmp_delta" = " 2"
register "FAN2.smart.pwm_start" = "30"
register "FAN2.smart.slope" = "64"
register "FAN3.mode" = "FAN_MODE_OFF"
device pnp 2e.0 off end # Floppy
device pnp 2e.1 on # COM 1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.2 on # COM 2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.3 on # Printer Port
io 0x60 = 0x378
io 0x62 = 0x000
irq 0x70 = 7
drq 0x74 = 4
irq 0xf0 = 0x00
end
device pnp 2e.4 on # Environment Controller
io 0x60 = 0xa30
io 0x62 = 0xa20
irq 0x70 = 0
irq 0xf0 = 0x80
end
device pnp 2e.5 off end # Keyboard
device pnp 2e.6 off end # Mouse
device pnp 2e.7 off end # GPIO
device pnp 2e.8 on # COM 3
io 0x60 = 0x3e8
irq 0x70 = 4
end
device pnp 2e.9 on # COM 4
io 0x60 = 0x2e8
irq 0x70 = 3
end
device pnp 2e.a off end # COM 5
device pnp 2e.b off end # COM 6
device pnp 2e.c off end # CIR
end
end # LPC bridge
device ref sata1 on end # SATA Controller 1
device ref smbus on end # SMBus
device ref sata2 off end # SATA Controller 2
device ref thermal off end # Thermal
end
end
end
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