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if BOARD_NVIDIA_L1_2PVV
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select ARCH_X86
select CPU_AMD_SOCKET_F
select DIMM_DDR2
select DIMM_REGISTERED
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_NVIDIA_MCP55
select MCP55_USE_NIC
select MCP55_USE_AZA
select SUPERIO_WINBOND_W83627EHG
select HAVE_OPTION_TABLE
select HAVE_BUS_CONFIG
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select HAVE_HARD_RESET
select LIFT_BSP_APIC_ID
select K8_REV_F_SUPPORT
select BOARD_ROMSIZE_KB_512
select RAMINIT_SYSINFO
select QRANK_DIMM_SUPPORT
select K8_ALLOCATE_IO_RANGE
config MAINBOARD_DIR
string
default nvidia/l1_2pvv
config DCACHE_RAM_BASE
hex
default 0xc8000
config DCACHE_RAM_SIZE
hex
default 0x08000
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0x01000
config APIC_ID_OFFSET
hex
default 0x10
config MEM_TRAIN_SEQ
int
default 1
config MCP55_NUM
int
default 2
config SB_HT_CHAIN_ON_BUS0
int
default 2
config MAINBOARD_PART_NUMBER
string
default "l1_2pvv"
config PCI_64BIT_PREF_MEM
bool
default n
config MAX_CPUS
int
default 4
config MAX_PHYSICAL_CPUS
int
default 2
config HT_CHAIN_UNITID_BASE
hex
default 0x0
config HT_CHAIN_END_UNITID_BASE
hex
default 0x20
config SERIAL_CPU_INIT
bool
default n
config IRQ_SLOT_COUNT
int
default 11
config MCP55_PCI_E_X_0
int
default 2
endif # BOARD_NVIDIA_L1_2PVV
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