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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
* Copyright 2016 Jonathan Neuschäfer <j.neuschaefer@gmx.net>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <boot_device.h>
#include <symbols.h>
/*
* _dram is the start of RAM. We currently need to load coreboot.rom into
* RAM. The actual "rom" code on the FPGAs is in a block ram.
*/
static const struct mem_region_device boot_dev =
MEM_REGION_DEV_RO_INIT(_dram, CONFIG_ROM_SIZE);
const struct region_device *boot_device_ro(void)
{
return &boot_dev.rdev;
}
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