1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
/*
* This file is part of the coreboot project.
*
* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; version 2 of
* the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include "smi.h"
Device (DSPC)
{
Name (_ADR, 0x00020001)
OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
Field (DSPC, ByteAcc, NoLock, Preserve)
{
Offset (0xf4),
BRTC, 8
}
Method(BRTD, 0, NotSerialized)
{
Store(BRTC, Local0)
if (LGreater (Local0, 15))
{
Subtract(Local0, 16, Local0)
Store(Local0, BRTC)
Trap(SMI_SAVE_CMOS)
}
}
Method(BRTU, 0, NotSerialized)
{
Store (BRTC, Local0)
if (LLess(Local0, 0xff))
{
Add (Local0, 16, Local0)
Store(Local0, BRTC)
Trap(SMI_SAVE_CMOS)
}
}
}
|
