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chip northbridge/intel/gm45
device domain 0 on
device pci 03.0 off end
chip southbridge/intel/i82801ix
register "sata_clock_request" = "1"
# Enable PCIe ports 1,2,4,5,6 as slots (Mini * PCIe).
register "pcie_slot_implemented" = "0x3b"
# Set power limits to 10 * 10^0 watts.
# Maybe we should set less for Mini PCIe.
register "pcie_power_limits" = "{ { 41, 0 }, { 41, 0 }, { 0, 0 }, { 41, 0 }, { 41, 0 }, { 41, 0 } }"
register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 1, 0, 0 }"
device pci 19.0 off end # LAN
device pci 1c.2 off end # PCIe Port #3
device pci 1c.4 on # PCIe Port #5
subsystemid 0x17aa 0x20f3
end
device pci 1c.5 on # PCIe Port #6
subsystemid 0x17aa 0x20f3 # Ethernet NIC
end
device pci 1f.0 on # LPC bridge
subsystemid 0x17aa 0x20f5
chip ec/lenovo/h8
device pnp ff.2 on end # dummy
register "config1" = "0x05"
register "config3" = "0x40"
register "event6_enable" = "0x87"
register "event7_enable" = "0x09"
register "event8_enable" = "0x5b"
register "eventa_enable" = "0x83"
register "eventb_enable" = "0x00"
end
end
device pci 1f.3 on # SMBus
subsystemid 0x17aa 0x20f9
# eeprom, 4 virtual devices, same chip
chip drivers/i2c/at24rf08c
device i2c 54 on end
device i2c 55 on end
device i2c 56 on end
device i2c 57 on end
end
end
end
end
end
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