blob: aefb51d25ef5658c6f1369dcbc5d56fbe8a71502 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
|
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2016 secunet Security Networks AG
* Copyright (C) 2017 Tobias Diedrich <ranma+coreboot@tdiedrich.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#undef SUPERIO_DEV
#undef SUPERIO_PNP_BASE
#define SUPERIO_DEV SIO0
#define SUPERIO_PNP_BASE 0x4e
#if !IS_ENABLED(CONFIG_DISABLE_UART_ON_TESTPADS)
#define NCT6776_SHOW_SP1 1
#endif
#define NCT6776_SHOW_HWM 1
#define NCT6776_SHOW_GPIO 1
#include "superio/nuvoton/nct6776/acpi/superio.asl"
|