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##
## This file is part of the coreboot project.
##
## Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc.
##
if BOARD_INTEL_D810E2CB
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select CPU_INTEL_SOCKET_FC_PGA370
select NORTHBRIDGE_INTEL_I82810
select SOUTHBRIDGE_INTEL_I82801BX
select SUPERIO_SMSC_SMSCSUPERIO
select HAVE_PIRQ_TABLE
select USE_WATCHDOG_ON_BOOT
select UDELAY_TSC
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
string
default intel/d810e2cb
config MAINBOARD_PART_NUMBER
string
default "D810E2CB"
config IRQ_SLOT_COUNT
int
default 7
endif # BOARD_INTEL_D810E2CB
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