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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H
#define __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H
#include <boardid.h>
#include <soc/rockchip/rk3288/gpio.h>
#define PMIC_BUS 0
#define GPIO_RESET (board_id() > 0 ? GPIO(0, B, 5) : GPIO(0, B, 2))
/* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
#endif /* __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H */
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