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chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "panel_cfg" = "{
.up_delay_ms = 100,
.down_delay_ms = 500,
.cycle_delay_ms = 500,
.backlight_on_delay_ms = 1,
.backlight_off_delay_ms = 200,
.backlight_pwm_hz = 1000,
}"
# Deep Sx states
register "deep_s3_enable_ac" = "0"
register "deep_s3_enable_dc" = "0"
register "deep_s5_enable_ac" = "1"
register "deep_s5_enable_dc" = "1"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD"
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
# offset bits also need to be changed.
register "gpe0_dw0" = "GPP_B"
register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E"
# Enable DPTF
register "dptf_enable" = "1"
# Enable S0ix
register "s0ix_enable" = true
# FSP Configuration
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"
register "ScsEmmcHs400Enabled" = "1"
register "SkipExtGfxScan" = "1"
register "SaGv" = "SaGv_Enabled"
register "PmConfigSlpS3MinAssert" = "2" # 50ms
register "PmConfigSlpS4MinAssert" = "1" # 1s
register "PmConfigSlpSusMinAssert" = "1" # 500ms
register "PmConfigSlpAMinAssert" = "3" # 2s
# VR Slew rate setting for improving audible noise
register "AcousticNoiseMitigation" = "1"
register "FastPkgCRampDisableIa" = "1"
register "FastPkgCRampDisableGt" = "1"
register "FastPkgCRampDisableSa" = "1"
register "SlowSlewRateForIa" = "3" # Fast/16
register "SlowSlewRateForGt" = "3" # Fast/16
register "SlowSlewRateForSa" = "2" # Fast/8
# VR Settings Configuration for 4 Domains
#+----------------+-------+-------+-------+-------+
#| Domain/Setting | SA | IA | GTUS | GTS |
#+----------------+-------+-------+-------+-------+
#| Psi1Threshold | 20A | 20A | 20A | 20A |
#| Psi2Threshold | 2A | 2A | 2A | 2A |
#| Psi3Threshold | 1A | 1A | 1A | 1A |
#| Psi3Enable | 1 | 1 | 1 | 1 |
#| Psi4Enable | 1 | 1 | 1 | 1 |
#| ImonSlope | 0 | 0 | 0 | 0 |
#| ImonOffset | 0 | 0 | 0 | 0 |
#| IccMax | 5A | 24A | 24A | 24A |
#| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
#| AcLoadline | 15 | 5.7 | 5.5 | 5.5 |
#| DcLoadline | 14.3 | 4.83 | 4.2 | 4.2 |
#+----------------+-------+-------+-------+-------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1,
.psi1threshold = VR_CFG_AMP(20),
.psi2threshold = VR_CFG_AMP(2),
.psi3threshold = VR_CFG_AMP(1),
.psi3enable = 1,
.psi4enable = 1,
.imon_slope = 0x0,
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(5),
.voltage_limit = 1520,
.ac_loadline = 1500,
.dc_loadline = 1430,
}"
register "domain_vr_config[VR_IA_CORE]" = "{
.vr_config_enable = 1,
.psi1threshold = VR_CFG_AMP(20),
.psi2threshold = VR_CFG_AMP(2),
.psi3threshold = VR_CFG_AMP(1),
.psi3enable = 1,
.psi4enable = 1,
.imon_slope = 0x0,
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(24),
.voltage_limit = 1520,
.ac_loadline = 570,
.dc_loadline = 483,
}"
register "domain_vr_config[VR_GT_UNSLICED]" = "{
.vr_config_enable = 1,
.psi1threshold = VR_CFG_AMP(20),
.psi2threshold = VR_CFG_AMP(2),
.psi3threshold = VR_CFG_AMP(1),
.psi3enable = 1,
.psi4enable = 1,
.imon_slope = 0x0,
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(24),
.voltage_limit = 1520,
.ac_loadline = 550,
.dc_loadline = 420,
}"
register "domain_vr_config[VR_GT_SLICED]" = "{
.vr_config_enable = 1,
.psi1threshold = VR_CFG_AMP(20),
.psi2threshold = VR_CFG_AMP(2),
.psi3threshold = VR_CFG_AMP(1),
.psi3enable = 1,
.psi4enable = 1,
.imon_slope = 0x0,
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(24),
.voltage_limit = 1520,
.ac_loadline = 550,
.dc_loadline = 420,
}"
# Intel Common SoC Config
#+-------------------+---------------------------+
#| Field | Value |
#+-------------------+---------------------------+
#| I2C0 | Touchscreen |
#| I2C1 | cr50 TPM. Early init is |
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
#| I2C2 | Trackpad |
#| I2C3 | Pen |
#| I2C4 | Camera |
#| I2C5 | Audio |
#| pch_thermal_trip | PCH Trip Temperature |
#+-------------------+---------------------------+
register "common_soc_config" = "{
.i2c[0] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 180,
.scl_hcnt = 90,
.sda_hold = 36,
},
},
.i2c[1] = {
.early_init = 1,
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 185,
.scl_hcnt = 90,
.sda_hold = 36,
},
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 190,
.scl_hcnt = 100,
.sda_hold = 36,
},
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 185,
.scl_hcnt = 90,
.sda_hold = 36,
},
},
.i2c[4] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 190,
.scl_hcnt = 100,
.sda_hold = 36,
},
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
.speed_config[0] = {
.speed = I2C_SPEED_FAST,
.scl_lcnt = 190,
.scl_hcnt = 100,
.sda_hold = 36,
},
},
.pch_thermal_trip = 75,
}"
# Touch Screen
register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3"
# H1
register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3"
# Trackpad
register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8"
# Pen
register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8"
# Camera
register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8"
# Audio
register "i2c_voltage[5]" = "I2C_VOLTAGE_1V8"
# Must leave UART0 enabled or SD/eMMC will not work as PCI
register "SerialIoDevMode" = "{
[PchSerialIoIndexI2C0] = PchSerialIoPci,
[PchSerialIoIndexI2C1] = PchSerialIoPci,
[PchSerialIoIndexI2C2] = PchSerialIoPci,
[PchSerialIoIndexI2C3] = PchSerialIoPci,
[PchSerialIoIndexI2C4] = PchSerialIoPci,
[PchSerialIoIndexI2C5] = PchSerialIoPci,
[PchSerialIoIndexSpi0] = PchSerialIoDisabled,
[PchSerialIoIndexSpi1] = PchSerialIoDisabled,
[PchSerialIoIndexUart0] = PchSerialIoSkipInit,
[PchSerialIoIndexUart1] = PchSerialIoDisabled,
[PchSerialIoIndexUart2] = PchSerialIoSkipInit,
}"
# PL2 override 15W for KBL-Y
register "power_limits_config" = "{
.tdp_pl2_override = 15,
.psys_pmax = 45,
}"
register "tcc_offset" = "10" # TCC of 90C
# Use default SD card detect GPIO configuration
register "sdcard_cd_gpio" = "GPP_E15"
device domain 0 on
device ref igpu on end
device ref sa_thermal on end
device ref imgu on end
device ref south_xhci on
register "usb2_ports" = "{
[0] = USB2_PORT_LONG(OC1), // Type-C Port 1
[1] = USB2_PORT_SHORT(OC2), // Type-A Port
[2] = USB2_PORT_SHORT(OC_SKIP), // Bluetooth
[4] = USB2_PORT_LONG(OC0), // Type-C Port 2
[6] = USB2_PORT_SHORT(OC_SKIP), // H1
[8] = USB2_PORT_SHORT(OC_SKIP), // Camera
}"
register "usb3_ports" = "{
[0] = USB3_PORT_DEFAULT(OC1), // Type-C Port 1
[1] = USB3_PORT_DEFAULT(OC0), // Type-C Port 2
[2] = USB3_PORT_DEFAULT(OC2), // Type-A Port
[3] = USB3_PORT_DEFAULT(OC_SKIP), // LTE module
}"
end
device ref south_xdci on end
device ref thermal on end
device ref cio on end
device ref i2c0 on
chip drivers/i2c/hid
register "generic.hid" = ""SYTS7813""
register "generic.desc" = ""Synaptics Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
register "generic.detect" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
register "generic.enable_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end
end
device ref i2c1 on
chip drivers/i2c/tpm
register "hid" = ""GOOG0005""
register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E0_IRQ)"
device i2c 50 on end
end
end
device ref i2c2 on
chip drivers/i2c/generic
register "hid" = ""STH9321""
register "name" = ""SEMTECH SX9321""
register "desc" = ""SAR Proximity Sensor""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A18_IRQ)"
register "device_present_gpio" = "GPP_B20"
device i2c 28 on end
end
end
device ref i2c3 on
chip drivers/i2c/hid
register "generic.hid" = ""ACPI0C50""
register "generic.cid" = ""PNP0C50""
register "generic.desc" = ""Digitizer device""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A22_IRQ)"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C9)"
register "generic.has_power_resource" = "1"
register "generic.wake" = "GPE0_DW0_21"
register "generic.detect" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0x9 on end
end
chip drivers/generic/gpio_keys
register "name" = ""PENH""
register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_B19)"
register "key.dev_name" = ""EJCT""
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
register "key.wakeup_route" = "WAKEUP_ROUTE_DISABLED"
device generic 0 on end
end
end
device ref heci1 on end
device ref uart2 on end
device ref i2c5 on
chip drivers/generic/max98357a
register "hid" = ""MX98357A""
register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)"
register "sdmode_delay" = "5"
device generic 0 on end
end
chip drivers/i2c/da7219
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D9_IRQ)"
register "btn_cfg" = "50"
register "mic_det_thr" = "200"
register "jack_ins_deb" = "20"
register "jack_det_rate" = ""32ms_64ms""
register "jack_rem_deb" = "1"
register "a_d_btn_thr" = "0xa"
register "d_b_btn_thr" = "0x16"
register "b_c_btn_thr" = "0x21"
register "c_mic_btn_thr" = "0x3e"
register "btn_avg" = "4"
register "adc_1bit_rpt" = "1"
register "micbias_lvl" = "2600"
register "mic_amp_in_sel" = ""diff""
device i2c 1A on end
end
end
device ref i2c4 on
chip drivers/i2c/generic
register "hid" = ""ELAN0000""
register "desc" = ""ELAN Touchpad""
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_B3_IRQ)"
register "wake" = "GPE0_DW0_05"
device i2c 15 on end
end
end
device ref pcie_rp1 on
register "PcieRpEnable[0]" = "1"
register "PcieRpClkReqSupport[0]" = "1"
register "PcieRpClkReqNumber[0]" = "1"
register "PcieRpClkSrcNumber[0]" = "1"
register "PcieRpAdvancedErrorReporting[0]" = "1"
register "PcieRpLtrEnable[0]" = "1"
chip drivers/wifi/generic
register "wake" = "GPE0_DW0_00"
device pci 00.0 on end
end
end
device ref uart0 on end
device ref emmc on end
device ref sdxc on end
device ref lpc_espi on
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
register "gen1_dec" = "0x00fc0801"
register "gen2_dec" = "0x000c0201"
# EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901"
chip ec/google/chromeec
device pnp 0c09.0 on end
end
end
device ref hda on end
device ref smbus on end
device ref fast_spi on end
end
end
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