1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <boardid.h>
#include <gpio.h>
#include <soc/gpio.h>
#include <variant/sku.h>
#include <ec/google/chromeec/ec.h>
static const struct pad_config default_override_table[] = {
PAD_NC(GPIO_104, UP_20K),
/* GPIO_137 -- HP_INT_ODL and would be amend by SSFC. */
PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1,
DISPUPD),
/* EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
DISPUPD),
PAD_NC(GPIO_213, DN_20K),
};
static const struct pad_config hdmi_override_table[] = {
PAD_NC(GPIO_104, UP_20K),
/* HV_DDI1_DDC_SDA */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, NONE, DEEP, NF1, HIZCRx1,
DISPUPD),
/* HV_DDI1_DDC_SCL */
PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, NONE, DEEP, NF1, HIZCRx1,
DISPUPD),
/* GPIO_137 -- HP_INT_ODL and would be amend by SSFC. */
PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1,
DISPUPD),
/* EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
DISPUPD),
PAD_NC(GPIO_213, DN_20K),
};
static const struct pad_config lte_override_table[] = {
/* Default override table. */
PAD_NC(GPIO_104, UP_20K),
/* GPIO_137 -- HP_INT_ODL and would be amend by SSFC. */
PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1,
DISPUPD),
/* EN_PP3300_TOUCHSCREEN */
PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0,
DISPUPD),
PAD_NC(GPIO_213, DN_20K),
/* Be specific to LTE SKU */
/* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
PAD_CFG_GPO(GPIO_67, 1, PWROK),
/* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
PAD_CFG_GPO(GPIO_117, 1, PWROK),
/* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
PAD_CFG_GPO(GPIO_161, 1, DEEP),
};
const struct pad_config *variant_override_gpio_table(size_t *num)
{
uint32_t sku_id;
sku_id = google_chromeec_get_board_sku();
switch (sku_id) {
case SKU_9_HDMI:
case SKU_19_HDMI_TS:
case SKU_50_HDMI:
case SKU_52_HDMI_TS:
*num = ARRAY_SIZE(hdmi_override_table);
return hdmi_override_table;
case SKU_17_LTE:
case SKU_18_LTE_TS:
case SKU_39_1A2C_360_LTE_TS_NO_STYLUES:
*num = ARRAY_SIZE(lte_override_table);
return lte_override_table;
default:
*num = ARRAY_SIZE(default_override_table);
return default_override_table;
}
}
static const struct pad_config lte_early_override_table[] = {
/* UART2-CTS_B -- EN_PP3300_DX_LTE_SOC */
PAD_CFG_GPO(GPIO_67, 1, PWROK),
/* PCIE_WAKE1_B -- FULL_CARD_POWER_OFF */
PAD_CFG_GPO(GPIO_117, 1, PWROK),
/* AVS_I2S1_MCLK -- PLT_RST_LTE_L */
PAD_CFG_GPO(GPIO_161, 0, DEEP),
};
const struct pad_config *variant_early_override_gpio_table(size_t *num)
{
*num = ARRAY_SIZE(lte_early_override_table);
return lte_early_override_table;
}
|