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##
## This file is part of the coreboot project.
##
## Copyright 2016 Rockchip Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
config BOARD_GOOGLE_GRU_COMMON # Umbrella option to be selected by variant boards.
def_bool n
if BOARD_GOOGLE_GRU_COMMON
# Most Grus have TPM2 but later Kevins don't... decide this in one place for
# convenience. Explicitly override it when building for earlier Kevins.
config GRU_HAS_TPM2
bool "Build for a board revision with a SPI TPM 2.0"
default n if BOARD_GOOGLE_KEVIN
default y
config GRU_HAS_CENTERLOG_PWM
bool
default y if BOARD_GOOGLE_GRU || BOARD_GOOGLE_KEVIN || BOARD_GOOGLE_BOB
default n
config GRU_HAS_WLAN_RESET
bool
default y if BOARD_GOOGLE_GRU || BOARD_GOOGLE_KEVIN || BOARD_GOOGLE_BOB
default n
config GRU_BASEBOARD_SCARLET
bool
default y if BOARD_GOOGLE_SCARLET
default n
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ID_AUTO
select BOARD_ROMSIZE_KB_8192
select COMMON_CBFS_SPI_WRAPPER
select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_RTC
select EC_GOOGLE_CHROMEEC_SPI
select HAVE_HARD_RESET
select MAINBOARD_FORCE_NATIVE_VGA_INIT
select MAINBOARD_HAS_CHROMEOS
select MAINBOARD_HAS_NATIVE_VGA_INIT
select RAM_CODE_SUPPORT
select RK3399_SPREAD_SPECTRUM_DDR if BOARD_GOOGLE_BOB
select RTC
select SOC_ROCKCHIP_RK3399
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES
select MAINBOARD_HAS_SPI_TPM_CR50 if GRU_HAS_TPM2
select SPI_TPM if GRU_HAS_TPM2
select VBOOT_VBNV_FLASH
config MAINBOARD_DIR
string
default google/gru
config MAINBOARD_VENDOR
string
default "Google"
config EC_GOOGLE_CHROMEEC_SPI_BUS
hex
default 0x5
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 1
config DRIVER_TPM_I2C_BUS
hex
default 0x0
config DRIVER_TPM_I2C_ADDR
hex
default 0x20
config DRIVER_TPM_SPI_BUS
hex
default 0x2 if BOARD_GOOGLE_SCARLET
default 0x0
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on DRIVERS_UART
default 0xFF1A0000
##########################################################
#### Update below when adding a new derivative board. ####
##########################################################
config DEVICETREE
string
default "devicetree.scarlet.cb" if BOARD_GOOGLE_SCARLET
default "devicetree.cb"
config MAINBOARD_PART_NUMBER
string
default "Scarlet" if BOARD_GOOGLE_SCARLET
default "Bob" if BOARD_GOOGLE_BOB
default "Gru" if BOARD_GOOGLE_GRU
default "Kevin" if BOARD_GOOGLE_KEVIN
default "Nefario" if BOARD_GOOGLE_NEFARIO
config GBB_HWID
string
depends on CHROMEOS
default "SCARLET TEST 7598" if BOARD_GOOGLE_SCARLET
default "BOB TEST 7422" if BOARD_GOOGLE_BOB
default "GRU TEST 5431" if BOARD_GOOGLE_GRU
default "KEVIN TEST 1422" if BOARD_GOOGLE_KEVIN
default "NEFARIO TEST 3735" if BOARD_GOOGLE_NEFARIO
endif # BOARD_GOOGLE_GRU_COMMON
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