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path: root/src/mainboard/google/brox/variants/lotso/overridetree.cb
blob: 2970635b63c8d25374d23897b0fd76ef3442ab23 (plain)
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fw_config
	field RETIMER 0 1
		option RETIMER_UNKNOWN		0
		option RETIMER_BYPASS		1
		option RETIMER_JHL8040		2
	end
	field STORAGE 2 3
		option STORAGE_UFS		1
		option STORAGE_NVME		2
	end
	field WIFI_BT 4 4
		option WIFI_CNVI_WIFI6E		0
		option WIFI_PCIE_WIFI7		1
	end
	field AUDIO 5 7
		option AUDIO_UNKNOWN		0
		option AUDIO_REALTEK_ALC256	1
		option AUDIO_REALTEK_ALC3287	2
	end
	field UFC 8 9
		option UFC_NONE			0
		option UFC_USB			1
	end
	field KB_BL 10 10
		option KB_BL_ABSENT		0
		option KB_BL_PRESENT		1
	end
	field FP 11 12
		option FP_PRESENT		0
		option FP_ABSENT		1
	end
	field ISH 21
		option ISH_DISABLE		0
		option ISH_ENABLE		1
	end
end

chip soc/intel/alderlake
	register "usb2_ports[0]" = "USB2_PORT_EMPTY"		# Disable USB2 Port
	register "usb2_ports[1]" = "USB2_PORT_MID(OC2)"		# Type-A Port A0
	register "usb2_ports[2]" = "USB2_PORT_MID(OC1)"		# Type-A Port A1
	register "usb2_ports[4]" = "USB2_PORT_EMPTY"		# Disable USB2 Port
	register "usb2_ports[6]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# USB2_C0
	register "usb2_ports[7]" = "USB2_PORT_TYPE_C(OC_SKIP)"	# USB2_C1
	register "usb2_ports[8]" = "USB2_PORT_EMPTY"		# Disable USB2 Port

	register "usb3_ports[0]" = "USB3_PORT_EMPTY"			# Disable USB3 Port
	register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC2)"		# Type-A Port A0
	register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC1)"		# Type A port A1

	register "tcss_ports[0]" = "TCSS_PORT_EMPTY"	# Disable TCP0
	register "tcss_ports[2]" = "TCSS_PORT_EMPTY" 	# Disable TCP2

	register "common_soc_config" = "{
		.i2c[0] = {
			.speed = I2C_SPEED_FAST,
			.rise_time_ns = 650,
			.fall_time_ns = 350,
			.data_hold_time_ns = 400,
		},
		.i2c[4] = {
			.early_init = 1,
			.speed = I2C_SPEED_FAST,
			.rise_time_ns = 600,
			.fall_time_ns = 110,
			.data_hold_time_ns = 100,
		},
	}"

	register "serial_io_gspi_mode" = "{
		[PchSerialIoIndexGSPI0] = PchSerialIoPci,
		[PchSerialIoIndexGSPI1] = PchSerialIoPci,
	}"

	register "power_limits_config[RPL_P_282_242_142_15W_CORE]" = "{
		.tdp_pl1_override = 15,
		.tdp_pl2_override = 40,
		.tdp_pl4 = 57,
	}"

	device domain 0 on
		device ref dtt on
			chip drivers/intel/dptf
				## sensor information
				register "options.tsr[0].desc" = ""DRAM_SOC""
				register "options.tsr[1].desc" = ""Ambient""
				register "options.tsr[2].desc" = ""Charger""
				register "options.tsr[3].desc" = ""5V""
				# TODO: below values are initial reference values only
				## Active Policy
				register "policies.active" = "{
						[0] = {
							.target = DPTF_TEMP_SENSOR_0,
							.thresholds = {
									TEMP_PCT(54, 64),
									TEMP_PCT(52, 52),
									TEMP_PCT(50, 44),
									TEMP_PCT(48, 38),
									TEMP_PCT(45, 34),
								}
						},
						[1] = {
							.target = DPTF_TEMP_SENSOR_1,
							.thresholds = {
									TEMP_PCT(75, 90),
									TEMP_PCT(70, 80),
									TEMP_PCT(65, 70),
									TEMP_PCT(55, 50),
								}
						},
						[2] = {
							.target = DPTF_TEMP_SENSOR_2,
							.thresholds = {
									TEMP_PCT(90, 90),
									TEMP_PCT(85, 80),
									TEMP_PCT(75, 70),
									TEMP_PCT(70, 50),
								}
						},
						[3] = {
							.target = DPTF_TEMP_SENSOR_3,
							.thresholds = {
									TEMP_PCT(80, 90),
									TEMP_PCT(75, 80),
									TEMP_PCT(70, 70),
									TEMP_PCT(65, 50),
								}
						}
				}"

				## Passive Policy
				register "policies.passive" = "{
						[1] = DPTF_PASSIVE(CPU,		TEMP_SENSOR_0, 85, 5000),
						[2] = DPTF_PASSIVE(CHARGER,	TEMP_SENSOR_1, 80, 5000),
				}"

				## Critical Policy
				register "policies.critical" = "{
						[1] = DPTF_CRITICAL(TEMP_SENSOR_0,      95, SHUTDOWN),
						[2] = DPTF_CRITICAL(TEMP_SENSOR_1,      95, SHUTDOWN),
				}"

				register "controls.power_limits" = "{
						.pl1 = {
							.min_power = 12000,
							.max_power = 15000,
							.time_window_min = 28 * MSECS_PER_SEC,
							.time_window_max = 32 * MSECS_PER_SEC,
							.granularity = 200,
						},
						.pl2 = {
							.min_power = 25000,
							.max_power = 25000,
							.time_window_min = 28 * MSECS_PER_SEC,
							.time_window_max = 32 * MSECS_PER_SEC,
							.granularity = 1000,
						}
				}"

				## Charger Performance Control (Control, mA)
				register "controls.charger_perf" = "{
						[0] = { 255, 1700 },
						[1] = {  24, 1500 },
						[2] = {  16, 1000 },
						[3] = {   8,  500 }
				}"

				## Fan Performance Control (Percent, Speed, Noise, Power)
				register "controls.fan_perf" = "{
						[0] = {  90, 4734, 220, 1640, },
						[1] = {  80, 4443, 180, 1310, },
						[2] = {  70, 4108, 145, 1030, },
						[3] = {  60, 3752, 115, 765, },
						[4] = {  50, 3352,  90,  545, },
						[5] = {  40, 2897,  55,  365, },
						[6] = {  30, 2363,  30,  220, },
						[7] = {  20, 1752,  15,  120, },
						[8] = {  10,  918,  10,  60, },
						[9] = {   0,    0,   0,   50, }
				}"

				## Fan options
				register "options.fan.fine_grained_control" = "1"
				register "options.fan.step_size" = "2"

				device generic 0 alias dptf_policy on end
			end
		end # DTT
		device ref igpu on
			chip drivers/gfx/generic
				register "device_count" = "6"
				# DDIA for eDP
				register "device[0].name" = ""LCD0""
				register "device[0].type" = "panel"
				# DDIB for HDMI
				# If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
				register "device[1].name" = ""DD01""
				# TCP0 (DP-1) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP0
				register "device[2].name" = ""DD02""
				# TCP1 (DP-2) for port C1
				register "device[3].name" = ""DD03""
				register "device[2].use_pld" = "true"
				register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
				# TCP2 (DP-3) for port C2
				register "device[4].name" = ""DD04""
				register "device[4].use_pld" = "true"
				register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
				# TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
				register "device[5].name" = ""DD05""
				device generic 0 on end
			end
		end # Integrated Graphics Device
		device ref gspi0 on
			chip drivers/spi/acpi
				register "name" = ""CRFP""
				register "hid" = "ACPI_DT_NAMESPACE_HID"
				register "uid" = "1"
				register "compat_string" = ""google,cros-ec-spi""
				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E18_IRQ)"
				register "wake" = "GPE0_DW2_18"
				register "has_power_resource" = "1"
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E21)"
				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E20)"
				register "enable_delay_ms" = "3"
				device spi 0 on end
			end # FPMCU
		end
		device ref pmc hidden
			chip drivers/intel/pmc_mux
				device generic 0 on
					chip drivers/intel/pmc_mux/conn
						use usb2_port7 as usb2_port
						use tcss_usb3_port1 as usb3_port
						device generic 0 alias conn0 on end
					end
					chip drivers/intel/pmc_mux/conn
						use usb2_port8 as usb2_port
						use tcss_usb3_port2 as usb3_port
						device generic 1 alias conn1 on end
					end
				end
			end
		end
		device ref tcss_xhci on
			chip drivers/usb/acpi
				device ref tcss_root_hub on
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-C Port C0 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
						device ref tcss_usb3_port1 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-C Port C1 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
						device ref tcss_usb3_port2 on end
					end
				end
			end
		end
		device ref xhci on
			chip drivers/usb/acpi
				device ref xhci_root_hub on
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-C Port C0 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
						device ref usb2_port7 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-C Port C1 (MLB)""
						register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
						device ref usb2_port8 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Camera""
						register "type" = "UPC_TYPE_INTERNAL"
						device ref usb2_port6 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-A Port A0 (DB)""
						register "type" = "UPC_TYPE_A"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))"
						device ref usb2_port2 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Type-A Port A1 (DB)""
						register "type" = "UPC_TYPE_A"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(4, 1))"
						device ref usb2_port3 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB2 Bluetooth""
						register "type" = "UPC_TYPE_INTERNAL"
						register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A13)"
						device ref usb2_port10 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-A Port A0 (DB)""
						register "type" = "UPC_TYPE_USB3_A"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
						device ref usb3_port2 on end
					end
					chip drivers/usb/acpi
						register "desc" = ""USB3 Type-A Port A1 (DB)""
						register "type" = "UPC_TYPE_USB3_A"
						register "use_custom_pld" = "true"
						register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(3, 1))"
						device ref usb3_port3 on end
					end
				end
			end
		end
		device ref pcie4_0 on
			# Enable CPU PCIE RP 1 using CLK 0
			register "cpu_pcie_rp[CPU_RP(1)]" = "{
				.clk_req = 0,
				.clk_src = 0,
				.flags = PCIE_RP_LTR | PCIE_RP_AER,
				.pcie_rp_aspm = ASPM_L1,
			}"
			probe STORAGE STORAGE_NVME
			probe unprovisioned
		end
		device ref pcie_rp5 on
			register "pch_pcie_rp[PCH_RP(5)]" = "{
				.clk_src = 2,
				.clk_req = 2,
				.flags = PCIE_RP_LTR | PCIE_RP_AER,
			}"
			chip drivers/wifi/generic
				register "wake" = "GPE0_DW0_03"
				register "add_acpi_dma_property" = "true"
				device pci 00.0 on end
			end
			chip soc/intel/common/block/pcie/rtd3
				# enable_gpio is controlled by the EC with EC_EN_PP3300_WLAN
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
				register "srcclk_pin" = "2"
				device generic 0 on end
			end
			probe WIFI_BT WIFI_PCIE_WIFI7
		end
		device ref pcie_rp6 on
			# Enable SD Card PCIE6 rp6 using clk 3
			register "pch_pcie_rp[PCH_RP(6)]" = "{
				.clk_src = 3,
				.clk_req = 3,
				.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
				.pcie_rp_aspm = ASPM_L1,
			}"
			chip soc/intel/common/block/pcie/rtd3
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E7)"
				register "enable_delay_ms" = "1"
				register "srcclk_pin" = "3"
				device generic 0 on end
			end
		end
		device ref cnvi_wifi on
			chip drivers/wifi/generic
				register "wake" = "GPE0_PME_B0"
				register "add_acpi_dma_property" = "true"
				register "enable_cnvi_ddr_rfim" = "true"
				device generic 0 on end
			end
			probe WIFI_BT WIFI_CNVI_WIFI6E
		end
		device ref ish on
			chip drivers/intel/ish
				device generic 0 alias ish_conf on end
			end
			probe STORAGE STORAGE_UFS
			probe unprovisioned
		end
		device ref ufs on
			probe STORAGE STORAGE_UFS
			probe unprovisioned
		end
		device ref i2c0 on
			chip drivers/i2c/generic
				register "hid" = ""ELAN0000""
				register "desc" = ""ELAN Touchpad""
				register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E3_IRQ)"
				register "wake" = "GPE0_DW2_03"
				register "detect" = "1"
				device i2c 0x15 on end
			end
			chip drivers/i2c/hid
				register "generic.hid" = ""FTCS0038""
				register "generic.cid" = ""PNP0C50""
				register "generic.desc" = ""Focal Touchpad""
				register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E3_IRQ)"
				register "generic.wake" = "GPE0_DW2_03"
				register "generic.detect" = "1"
				register "hid_desc_reg_offset" = "0x20"
				device i2c 0x38 on end
			end
		end #I2C0
		device ref gspi1 on
			chip drivers/spi/acpi
				register "name" = ""GTP0""
				register "hid" = ""GXTS7986""
				register "uid" = "0x3"
				register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_F18_IRQ)"
				register "speed" = "10 * MHz"
				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F17)"
				register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F7)"
				register "property_count" = "1"
				register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
				register "property_list[0].name" = ""goodix,hid-report-addr""
				register "property_list[0].integer" = "0x22c8c"
 				device spi 0 on end
			end # touchscreen
		end
	end
end