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##
## This file is part of the coreboot project.
##
## Copyright (C) 2018-2019 Eltan B.V.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
if BOARD_FACEBOOK_FBG1701
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select MAINBOARD_HAS_LPC_TPM
select MAINBOARD_HAS_TPM2
select SOC_INTEL_BRASWELL
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
select PCIEXP_L1_SUB_STATE
select HAVE_FSP_BIN
select CACHE_MRC_SETTINGS
select DISABLE_HPET
select INTEL_GMA_HAVE_VBT
select GENERIC_SPD_BIN
choice
prompt "Onboard memory manufacturer"
default ONBOARD_MICRON_MEM
config ONBOARD_SAMSUNG_MEM
bool "Samsung"
help
Samsung K4B8G1646D memory
config ONBOARD_MICRON_MEM
bool "Micron"
help
Micron MT41K512M16HA memory
endchoice
config MAINBOARD_DIR
string
default facebook/fbg1701
config MAINBOARD_PART_NUMBER
string
default "FBG-1701"
config CBFS_SIZE
hex
default 0x00600000
config CPU_MICROCODE_CBFS_LEN
hex
default 0x10C00
help
This should be updated when the microcode patch changes.
config CPU_MICROCODE_CBFS_LOC
hex
default 0xFFFE9400
config MRC_SETTINGS_CACHE_SIZE
hex
default 0x08000
config FSP_LOC
hex
default 0xfff9c000
config FSP1_1_DISPLAY_LOGO
bool
default n
config SPI_FLASH_INCLUDE_ALL_DRIVERS
bool
default n
config SPI_FLASH_WINBOND
bool
default y
config TPM_INIT
bool "TPM Setup in RAMSTAGE"
default n
config C_ENV_BOOTBLOCK_SIZE
hex "C Bootblock Size"
default 0x4000
endif # BOARD_FACEBOOK_FBG1701
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