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##
## Config file for the Embedded Planet EP405PC Computing Engine
##
uses PCIC0_CFGADDR
uses PCIC0_CFGDATA
uses UART0_IO_BASE
option PCIC0_CFGADDR=0xeec00000
option PCIC0_CFGDATA=0xeec00004
option UART0_IO_BASE=0xef600300
arch ppc end
cpu ppc/ppc4xx end
##
## Include the secondary Configuration files
##
southbridge winbond/w83c553 end
##
## Build the objects we have code for in this directory.
##
addaction linuxbios.a "$(CROSS_COMPILE)ranlib linuxbios.a"
makedefine CFLAGS += -g
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